AMD Am186TMER ユーザーズマニュアル
Programming
2-1
CHAPTER
2
PROGRAMMING
All members of the Am186 and Am188 family of microcontrollers, including the Am186ER
and Am188ER, contain the same basic set of registers, instructions, and addressing modes,
and are compatible with the original industry-standard 186/188 parts.
and Am188ER, contain the same basic set of registers, instructions, and addressing modes,
and are compatible with the original industry-standard 186/188 parts.
2.1
REGISTER SET
The base architecture of the Am186ER and Am188ER microcontrollers has 14 registers,
as shown in Figure 2-1. These registers are grouped into the following categories:
as shown in Figure 2-1. These registers are grouped into the following categories:
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General Registers—Eight 16-bit general purpose registers can be used for arithmetic
and logical operands. Four of these (AX, BX, CX, and DX) can be used as 16-bit registers
or split into pairs of separate 8-bit registers (AH, AL, BH, BL, CH, CL, DH, and DL). The
Destination Index (DI) and Source Index (SI) general-purpose registers are used for
data movement and string instructions. The Base Pointer (BP) and Stack Pointer (SP)
general-purpose registers are used for the stack segment and point to the bottom and
top of the stack, respectively.
and logical operands. Four of these (AX, BX, CX, and DX) can be used as 16-bit registers
or split into pairs of separate 8-bit registers (AH, AL, BH, BL, CH, CL, DH, and DL). The
Destination Index (DI) and Source Index (SI) general-purpose registers are used for
data movement and string instructions. The Base Pointer (BP) and Stack Pointer (SP)
general-purpose registers are used for the stack segment and point to the bottom and
top of the stack, respectively.
– Base and Index Registers—Four of the general-purpose registers (BP, BX, DI, and
SI) can also be used to determine offset addresses of operands in memory. These
registers can contain base addresses or indexes to particular locations within a
segment. The addressing mode selects the specific registers for operand and address
calculations.
registers can contain base addresses or indexes to particular locations within a
segment. The addressing mode selects the specific registers for operand and address
calculations.
– Stack Pointer Register—All stack operations (POP, POPA, POPF, PUSH, PUSHA,
PUSHF) utilize the stack pointer. The Stack Pointer Register is always offset from the
Stack Segment (SS) Register, and no segment override is allowed.
Stack Segment (SS) Register, and no segment override is allowed.
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Segment Registers—Four 16-bit special-purpose registers (CS, DS, ES, and SS)
select, at any given time, the segments of memory that are immediately addressable
for code (CS), data (DS and ES), and stack (SS) memory. (For usage, refer to section
2.2.)
select, at any given time, the segments of memory that are immediately addressable
for code (CS), data (DS and ES), and stack (SS) memory. (For usage, refer to section
2.2.)
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Status and Control Registers—Two 16-bit special-purpose registers record or alter certain
aspects of the processor state—the Instruction Pointer (IP) Register contains the offset
address of the next sequential instruction to be executed and the Processor Status Flags
(FLAGS) Register contains status and control flag bits (see Figure 2-1 and Figure 2-2).
aspects of the processor state—the Instruction Pointer (IP) Register contains the offset
address of the next sequential instruction to be executed and the Processor Status Flags
(FLAGS) Register contains status and control flag bits (see Figure 2-1 and Figure 2-2).
Note that the Am186ER and Am188ER microcontrollers have additional on-chip peripheral
registers, which are external to the processor. These external registers are not accessible
by the instruction set. However, because the processor treats these peripheral registers
like memory, instructions that have operands that access memory can also access
peripheral registers. The above processor registers, as well as the additional on-chip
peripheral registers, are described in the chapters that follow.
registers, which are external to the processor. These external registers are not accessible
by the instruction set. However, because the processor treats these peripheral registers
like memory, instructions that have operands that access memory can also access
peripheral registers. The above processor registers, as well as the additional on-chip
peripheral registers, are described in the chapters that follow.