Intel 80C196NU ユーザーズマニュアル
8XC196NP, 80C196NU USER’S MANUAL
10-10
Figure 10-6. EPA Simplified Input-capture Structure
If a third event occurs before the CPU reads the event-time register, the overwrite bit
(EPAx_CON.0) determines how the EPA will handle the event. If the bit is clear, the EPA ignores
the third event. If the bit is set, the third event time overwrites the second event time in the capture
buffer. Both situations set the overrun interrupt pending bit, and if the interrupt is enabled, they
generate an overrun interrupt. Table 10-4 summarizes the possible actions when a valid event oc-
curs.
(EPAx_CON.0) determines how the EPA will handle the event. If the bit is clear, the EPA ignores
the third event. If the bit is set, the third event time overwrites the second event time in the capture
buffer. Both situations set the overrun interrupt pending bit, and if the interrupt is enabled, they
generate an overrun interrupt. Table 10-4 summarizes the possible actions when a valid event oc-
curs.
NOTE
In order for an event to be captured, the signal must be stable for at least two
state times both before and after the transition occurs (Figure 10-7).
state times both before and after the transition occurs (Figure 10-7).
Figure 10-7. Valid EPA Input Events
TIMER
x
Capture Buffer
EPA
x_TIME
Read-out Time Value
EPA
Interrupt
Pending Bit
Set
Event Occurs
at EPA Pin
A2458-02
A3130-01
Event 1
2 State
Times
2 State
Times
Event 2
2 State
Times
2 State
Times