Texas Instruments TMS320DM646x 사용자 설명서
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4.7
MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
MDIO Registers
The MDIO user command complete interrupt (unmasked) register (USERINTRAW) is shown in
and described in
Figure 33. MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
31
16
Reserved
R-0
15
2
1
0
Reserved
USERINTRAW
R-0
R/W1C-0
LEGEND: R = Read only; R/W = Read/Write; W1C = Write 1 to clear, write of 0 has no effect; -n = value after reset
Table 31. MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
Field Descriptions
Bit
Field
Value
Description
31-2
Reserved
0
Reserved
1-0
USERINTRAW
0-3h
MDIO User command complete event bits. When asserted, a bit indicates that the previously
scheduled PHY read or write command using that particular USERACCESS register has
completed. USERINTRAW[0] and USERINTRAW[1] correspond to USERACCESS0 and
USERACCESS1, respectively. Writing a 1 will clear the event and writing a 0 has no effect.
scheduled PHY read or write command using that particular USERACCESS register has
completed. USERINTRAW[0] and USERINTRAW[1] correspond to USERACCESS0 and
USERACCESS1, respectively. Writing a 1 will clear the event and writing a 0 has no effect.
0
No MDIO user command complete event.
1
The previously scheduled PHY read or write command using MDIO user access register n
(USERACCESSn) has completed.
(USERACCESSn) has completed.
76
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
SPRUEQ6 – December 2007