Intel cpb4612 사용자 설명서
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4.1 Reset Types and Sources
The cPB-4612’s reset types are listed below. The sources for each reset type are detailed in the following
topics.
topics.
• Hard Reset: All devices are held in reset.
• Soft Reset: CPU initialization only. Other devices are not reset.
• Backend Power Down: The backend logic is powered off. The board is powered on and is held in
• Soft Reset: CPU initialization only. Other devices are not reset.
• Backend Power Down: The backend logic is powered off. The board is powered on and is held in
reset.
• NMI: Non-maskable interrupt. Though not a reset in the strict sense, an NMI can have the same
effect as other resets.
4.1.1 Hard Reset Sources
System Register CF9h (6300ESB Reset Control Register)
Bits 1 and 2 in this register are used by the 6300ESB to generate a hard reset or a soft reset. During a
hard reset, the 6300ESB asserts CPURST, PCIRST#, and RSTDRV. Additionally, it resets its core and
suspends well logic.
Bits 1 and 2 in this register are used by the 6300ESB to generate a hard reset or a soft reset. During a
hard reset, the 6300ESB asserts CPURST, PCIRST#, and RSTDRV. Additionally, it resets its core and
suspends well logic.
4.1.2 Soft Reset Sources
System Register CF9h (6300ESB Reset Control Register)
Bits 1 and 2 in this register are used by the 6300ESB to generate a hard reset or a soft reset. During a
soft reset, the ICH4 asserts INIT to the CPU for 16 PCICLK. This causes the processor to enter "real
mode", initialize its internal registers, and begin instruction execution from FFFFFFF0h (the boot vector).
soft reset, the ICH4 asserts INIT to the CPU for 16 PCICLK. This causes the processor to enter "real
mode", initialize its internal registers, and begin instruction execution from FFFFFFF0h (the boot vector).
Keyboard Controller Reset
The keyboard controller generates a keyboard controller reset when FEh is written to port 64h. This
causes the 6300ESB to assert INIT to the CPU.
causes the 6300ESB to assert INIT to the CPU.
Keyboard CTRL-ALT-DEL
Simultaneously pressing these keys calls a BIOS function that reboots the system.
Note: This method does not work under operating systems that trap calls to this BIOS
function.
function.
Watchdog Timer (System Register Address 79h)
The watchdog timer may be programmed to generate a "CPU Init" if it is not strobed within a given time-
out period. This function is discussed in Chapter 7, "Watchdog Timer."
out period. This function is discussed in Chapter 7, "Watchdog Timer."
4.1.3 Backend Power Down Sources
Board Extraction
When a board is extracted from an enclosure (specifically, when the "board-select" [BD_SEL] pin is
disengaged), the hot swap controller unconditionally removes backend power from the board and holds
the board in reset.
disengaged), the hot swap controller unconditionally removes backend power from the board and holds
the board in reset.
Low Voltage
When any of the 3.3V, 5V, or 12V supply voltages are detected to be below an acceptable operating limit,
the hot swap controller unconditionally removes backend power and holds the board in reset.
the hot swap controller unconditionally removes backend power and holds the board in reset.