Samsung S3C2440A 사용자 설명서
S3C2440A RISC MICROPROCESSOR
ARM INSTRUCTION SET
3-1
3
ARM INSTRUCTION SET
INSTRUCTION SET SUMMAY
This chapter describes the ARM instruction set in the ARM920T core.
FORMAT SUMMARY
The following figure shows the ARM instruction set.
Cond
Rn
Data/Processing/
PSR Transfer
PSR Transfer
0 0 I
S
Opcode
0 0 0 P U 0 W L
0 0 0 P U 1 W L
0 1 I P U B W L
0 1 I
1 0 0 P U B W L
1
1
1
1
1
1
1
1
1 0
L
1
1 1 0 P U B W L
1 1
1
1
1 1
0
1
1 1
0
1
L
Rd
Rd
Rn
RdHi
RdLo
Rn
Rn
Rn
Rn
Rd
Rd
Rd
Rn
Register List
Rn
CRn
CRn
CRd
Rd
CP Opc
CP
Opc
Operand2
Rs
Rm
Rm
Rm
Rm
Rn
Rn
Rd
Offset
Offset
CRd
Offset
CP#
CP#
CP#
CP
CP
CRm
CRm
Ignored by processor
0
1
Offset
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
0 0 0 0
0
0
A S
A S
U
1
0 0
0
0
0 0 0
0
0 0
1
B
1
0
0
0
1
0 0 0
1
1
1
1
1
1
0
0
0
0
H
H
0
0
0
0
S
S
1
1
1
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
1
Multiply
Multiply Long
Single Data Swap
Branch and Exchange
Halfword Data Transfer:
register offset
register offset
Halfword Data Transfer:
immendiate offset
immendiate offset
Single Data Transfer
Undefined
Block Data Transfer
Branch
Coprocessor Register Transfer
Coprocessor Data Operation
Coprocessor Data Transfer
Software Interrupt
Offset
27 26 25 24 23 22 21 20 19 18 17 16 15
13
14
12 11 10
31 30 29 28
9 8 7 6 5 4 3 2 1 0
27 26 25 24 23 22 21 20 19 18 17 16 15
13
14
12 11 10
31 30 29 28
9 8 7 6 5 4 3 2 1 0
Figure 3-1. ARM Instruction Set Format