Texas Instruments TMS320C6452 DSP 사용자 설명서
![Texas Instruments](https://files.manualsbrain.com/attachments/b46f99d826b2b0e0e5f558c5fb6483942eb9216b/common/fit/150/50/c15ea36eb1fb1cce99a3b94668675bfc78ce832d8d727d9a7bb51a125510/brand_logo.gif)
www.ti.com
CK
CK
CKE
CS
WE
RAS
CAS
DM
DQS
BA[2:0]
A[13:0]
DQ[7:0]
VREF
DDR2
memory
x8−bit
DQS
RDQS
DDR_CLK
DDR_CLK
DDR_CKE
DDR_CS
DDR_WE
DDR_RAS
DDR_DQM0
DDR_CAS
DDR_DQS0
DDR_DQS0
DDR_BA[2:0]
DDR_A[13:0]
DDR_D[7:0]
DDR_DQM1
DDR_DQS1
DDR_D[15:8]
DDR_VREF
DDR2
memory
controller
ODT
DDR_ODT0
DDR_ODT1
DDR_DQS1
memory
x8−bit
DQS
A[13:0]
VREF
ODT
DQ[7:0]
RDQS
BA[2:0]
RDQS
DQS
DM
RAS
CAS
WE
CS
CKE
CK
CK
DDR2
VREF
RDQS
DDR_DQGATE0
(A)
DDR_DQGATE1
(A)
DDR_DQGATE2
(A)
DDR_DQGATE3
(A)
Using the DDR2 Memory Controller
Figure 19. Connecting to Two 8-Bit DDR2 SDRAM Devices
A
These pins are used as a timing reference during memory reads. For routing rules, see the device-specific data
manual.
manual.
DSP DDR2 Memory Controller
32
SPRUF85 – October 2007