Texas Instruments TMS320C3x 사용자 설명서

Examples

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4–1

Pipeline Effects of Modifying the Cache Control Bits

5–1

Positive Number

5–2

Negative Number

5–3

Fractional Number

5–4

IEEE-to-TMS320C3x Conversion (Fast Version)

5–5

IEEE-to-TMS320C3x Conversion (Complete Version)

5–6

TMS320C3x-to-IEEE Conversion (Fast Version)

5–7

TMS320C3x-to-IEEE Conversion (Complete Version)

5–8

 Floating-Point Multiply (Both Mantissas = –2.0)

5–9

 Floating-Point Multiply (Both Mantissas = 1.5)

5–10

 Floating-Point Multiply (Both Mantissas = 1.0)

5–11

 Floating-Point Multiply Between Positive and Negative Numbers

5–12

 Floating-Point Multiply by 0

5–13

 Floating-Point Addition

5–14

 Floating-Point Subtraction

5–15

 Floating-Point Addition With a 32-Bit Shift

5–16

 Floating-Point Addition/Subtraction With Floating-Point 0

5–17

NORM Instruction

6–1

Direct Addressing

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6–2

Auxiliary Register Indirect

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6–3

Indirect Addressing With Predisplacement Add

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

6–4

Indirect Addressing With Predisplacement Subtract

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

6–5

Indirect Addressing With Predisplacement Add and Modify

6–6

Indirect Addressing With Predisplacement Subtract and Modify

6–7

Indirect Addressing With Postdisplacement Add and Modify

6–8

Indirect Addressing With Postdisplacement Subtract and Modify

6–9

Indirect Addressing With Postdisplacement Add and Circular Modify

6–10

Indirect Addressing With Postdisplacement Subtract and Circular Modify

6–11

Indirect Addressing With Preindex Add

6–12

Indirect Addressing With Preindex Subtract

6–13

Indirect Addressing With Preindex Add and Modify

6–14

Indirect Addressing With Preindex Subtract and Modify

6–15

Indirect Addressing With Postindex Add and Modify

6–16

Indirect Addressing With Postindex Subtract and Modify

6–17

Indirect Addressing With Postindex Add and Circular Modify

6–18

Indirect Addressing With Postindex Subtract and Circular Modify