Texas Instruments TMS320C3x 사용자 설명서

 Branch Conditionally (Standard)

13-79

  Assembly Language Instructions

cond  src

If

 cond is true:

If 

src is in register-addressing mode (Rn, 0 

≤

n 

≤

27),

src 

→

 PC.

If 

src is in PC-relative mode (label or address),

displacement + PC + 1 

→

 PC.

Else, continue

src conditional-branch addressing modes (B):

0

register

1

PC relative

31

24 23

16

8 7

0

15

0 1 1 0 1

0 0

B

0

Register or displacement

0 0

cond

B

cond signifies a standard branch that executes in four cycles. A branch is per-

formed if the condition is true (since a pipeline flush also occurs on a true condi-
tion; see Section 8.2, 

Pipeline Conflicts, on page 8-4). If the src operand is ex-

pressed in register addressing mode, the contents of the specified register are
loaded into the PC. If the 

src operand is expressed in PC-relative mode, the

assembler generates a displacement: displacement = label – (PC of branch
instruction + 1). This displacement is stored as a 16-bit signed integer in the
16 LSBs of the branch instruction word. This displacement is added to the PC
of the branch instruction plus 1 to generate the new PC.

The ’C3x provides 20 condition codes that you can use with this instruction
(see Table 13–12 on page 13-30 for a list of condition mnemonics, condition
codes and flags). Condition flags are set on a previous instruction only when
the destination register is one of the extended-precision registers (R7–R0) or
when one of the compare instructions (CMPF, CMPF3, CMPI, CMPI3, TSTB,
or TSTB3) is executed.

4

Unaffected

Unaffected

Unaffected

Unaffected

Unaffected

Unaffected

Unaffected

Operation is not affected by OVM bit value.