Texas Instruments TMS320TCI648x 사용자 설명서
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LSU _REG1
n
T0
T1
T2
T3
T4
T5
Tn
Valid
LSU _REG2
n
Valid
LSU _REG3
n
Valid
LSU _REG4
n
Valid
LSU _REG5
n
Valid
Rdy/BSY
Completion
Valid
Valid
After Transaction Completes
SRIO Functional Description
Figure 13. LSU Registers Timing
The following code illustrates an LSU registers programming example.
SRIO_REGS->LSU1_REG0 =
CSL_FMK( SRIO_LSU1_REG0_RAPIDIO_ADDRESS_MSB,0 );
SRIO_REGS->LSU1_REG1 =
CSL_FMK( SRIO_LSU1_REG1_ADDRESS_LSB_CONFIG_OFFSET,(int)&rcvBuff1[0] );
SRIO_REGS->LSU1_REG2 =
CSL_FMK( SRIO_LSU1_REG2_DSP_ADDRESS, (int)&xmtBuff1[0]);
SRIO_REGS->LSU1_REG3 =
CSL_FMK( SRIO_LSU1_REG3_BYTE_COUNT,byte_count );
SRIO_REGS->LSU1_REG4 =
CSL_FMK( SRIO_LSU1_REG4_OUTPORTID,0 )
|
CSL_FMK( SRIO_LSU1_REG4_PRIORITY,0 )
|
CSL_FMK( SRIO_LSU1_REG4_XAMSB,0 )
|
CSL_FMK( SRIO_LSU1_REG4_ID_SIZE,1 )
|
CSL_FMK( SRIO_LSU1_REG4_DESTID,0xBEEF )|
CSL_FMK( SRIO_LSU1_REG4_INTERRUPT_REQ,1 );
SRIO_REGS->LSU1_REG5 =
CSL_FMK( SRIO_LSU1_REG5_DRBLL_INFO,0x0000 )|
CSL_FMK( SRIO_LSU1_REG5_HOP_COUNT,0x00 )
|
CSL_FMK( SRIO_LSU1_REG5_PACKET_TYPE,type );
gives an example of the data flow and field mappings for a burst NWRITE_R transaction.
38
Serial RapidIO (SRIO)
SPRUE13A – September 2006