Motorola MVME2300 Series 사용자 설명서
Functional Description
http://www.motorola.com/computer/literature
4-19
4
80821000 3000000 23000000 3d000000
7. Do a bye.
The values before the init code runs are:
80820000 0 20000000 0
This produces the same results with the MVME360x as with the
MVME260x, and the difference seen earlier is related to the values
of the LSI0 slave at the time the PCI reset occurred.
MVME260x, and the difference seen earlier is related to the values
of the LSI0 slave at the time the PCI reset occurred.
Example 3: Universe Chip is Checked at Tundra
An engineer at Tundra Semiconductor Corporation had run a simulation on
the LSI0_CTL register, and could see that it was going to be enabled after
a port 92 reset. Motorola engineers mentioned that the problem was
primarily with the _BS, _BD, and _TO registers. He said he would run
more simulations to look at the outcome on those registers. Motorola
engineers explained what they had seen.
the LSI0_CTL register, and could see that it was going to be enabled after
a port 92 reset. Motorola engineers mentioned that the problem was
primarily with the _BS, _BD, and _TO registers. He said he would run
more simulations to look at the outcome on those registers. Motorola
engineers explained what they had seen.
The engineer at Tundra re-ran the simulation based on the information
given him. He saw exactly what the Motorola engineers had seen, i.e., that
the LSI0_BS, LSI0_BD, and LSI0_TO values changed, as well as the
LSI0_CTL fields for program, super, and vct. He checked to see whether
this was in fact what the Universe is supposed to do.
given him. He saw exactly what the Motorola engineers had seen, i.e., that
the LSI0_BS, LSI0_BD, and LSI0_TO values changed, as well as the
LSI0_CTL fields for program, super, and vct. He checked to see whether
this was in fact what the Universe is supposed to do.
The following are his results:
Register Before RST# After RST#
-------- ----------- -----------
LSI0_CTL 8082_5FFF 8082_0001
LSI0_BS FFFF_FFFF F000_0000
LSI0_BD FFFF_FFFF F000_0000
LSIO_TO FFFF_FFFF 0000_0000
Explanation:
All the fields in the LSI0 registers which are "Power-up Options" cannot
be reset by assertion of RST# (PCI reset).
be reset by assertion of RST# (PCI reset).
The following fields in the LSIO registers cannot be reset by a PCI reset: