Microchip Technology MCU PIC10F322T-I/OT SOT-23-6 MCP PIC10F322T-I/OT 데이터 시트
제품 코드
PIC10F322T-I/OT
PIC10(L)F320/322
DS41585A-page 112
Preliminary
2011 Microchip Technology Inc.
REGISTER 18-2:
PWMxDCH: PWM DUTY CYCLE HIGH BITS
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
PWMxDCH<7:0>
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-0
PWMxDCH<7:0>:
PWM Duty Cycle Most Significant bits
These bits are the MSbs of the PWM duty cycle. The two LSbs are found in the PWMxDCL Register.
REGISTER 18-3:
PWMxDCL: PWM DUTY CYCLE LOW BITS
R/W-x/u
R/W-x/u
U-0
U-0
U-0
U-0
U-0
U-0
PWMxDCL<7:6>
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-6
PWMxDCL<7:6>:
PWM Duty Cycle Least Significant bits
These bits are the LSbs of the PWM duty cycle. The MSbs are found in the PWMxDCH Register.
bit 5-0
Unimplemented:
Read as ‘0’
TABLE 18-3:
SUMMARY OF REGISTERS ASSOCIATED WITH PWM
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELA
—
—
—
—
—
ANSA2
ANSA1
ANSA0
LATA
—
—
—
—
—
LATA2
LATA1
LATA0
PORTA
—
—
—
—
RA3
RA2
RA1
RA0
PR2
Timer2 module Period Register
PWM1CON
PWM1EN
PWM1OE
PWM1OUT PWM1POL
—
—
—
—
PWM1DCH
PWM1DCH<7:0>
PWM1DCL
PWM1DCL<7:6>
—
—
—
—
—
—
PWM2CON
PWM2EN
PWM2OE
PWM2OUT PWM2POL
—
—
—
—
PWM2DCH
PWM2DCH<7:0>
PWM2DCL
PWM2DCL<7:6>
—
—
—
—
—
—
T2CON
—
TOUTPS<3:0>
TMR2ON
T2CKPS<1:0>
TMR2
Timer2 module Register
TRISA
—
—
—
—
—
TRISA2
TRISA1
TRISA0
Legend:
- = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.