Texas Instruments Delfino C28346 DIM168 ControlCARD TMDSCNCD28346-168 TMDSCNCD28346-168 데이터 시트
제품 코드
TMDSCNCD28346-168
SPRS516D – MARCH 2009 – REVISED AUGUST 2012
3.7
Low-Power Modes Block
The low-power modes on the C2834x devices are similar to the 240x devices.
summarizes the
various modes.
Table 3-15. Low-Power Modes
MODE
LPMCR0(1:0)
OSCCLK
CLKIN
SYSCLKOUT
EXIT
(1)
XRS, Watchdog interrupt, any enabled
IDLE
00
On
On
On
(2)
interrupt, XNMI
On
XRS, Watchdog interrupt, GPIO Port A
STANDBY
01
Off
Off
(watchdog still running)
signal, debugger
(3)
, XNMI
Off
XRS, GPIO Port A signal, XNMI,
HALT
1X
(oscillator and PLL turned off,
Off
Off
debugger
(3)
watchdog not functional)
(1)
The Exit column lists which signals or under what conditions the low power mode will be exited. A low signal, on any of the signals, will
exit the low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, the
low-power mode will not be exited and the device will go back into the indicated low power mode.
exit the low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, the
low-power mode will not be exited and the device will go back into the indicated low power mode.
(2)
The IDLE mode on the C28x behaves differently than on the 24x/240x. On the C28x, the clock output from the CPU (SYSCLKOUT) is
still functional while on the 24x/240x the clock is turned off.
still functional while on the 24x/240x the clock is turned off.
(3)
On the C28x, the JTAG port can still function even if the CPU clock (CLKIN) is turned off.
The various low-power modes operate as follows:
IDLE Mode:
This mode is exited by any enabled interrupt or an XNMI that is recognized
by the processor. The LPM block performs no tasks during this mode as
long as the LPMCR0(LPM) bits are set to 0,0.
by the processor. The LPM block performs no tasks during this mode as
long as the LPMCR0(LPM) bits are set to 0,0.
STANDBY Mode:
Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBY
mode. The user must select which signal(s) will wake the device in the
GPIOLPMSEL register. The selected signal(s) are also qualified by the
OSCCLK before waking the device. The number of OSCCLKs is specified in
the LPMCR0 register.
mode. The user must select which signal(s) will wake the device in the
GPIOLPMSEL register. The selected signal(s) are also qualified by the
OSCCLK before waking the device. The number of OSCCLKs is specified in
the LPMCR0 register.
HALT Mode:
Only the XRS and any GPIO port A signal (GPIO[31:0]) can wake the
device from HALT mode. The user selects the signal in the GPIOLPMSEL
register.
device from HALT mode. The user selects the signal in the GPIOLPMSEL
register.
NOTE
The low-power modes do not affect the state of the output pins (PWM pins included). They
will be in whatever state the code left them in when the IDLE instruction was executed. See
the TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature
number
will be in whatever state the code left them in when the IDLE instruction was executed. See
the TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature
number
) for more details.
60
Functional Overview
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