Texas Instruments Delfino C28346 DIM168 ControlCARD TMDSCNCD28346-168 TMDSCNCD28346-168 데이터 시트
제품 코드
TMDSCNCD28346-168
GPxDAT (read)
Input
Qualification
GPxMUX1/2
High-Impedance
Output Control
GPIOx pin
XRS
0 = Input, 1 = Output
Low-Power
Modes Block
01
10
11
01
10
11
01
10
11
GPxPUD
Internal
Pullup
= Default at Reset
External Interrupt
MUX
Peripheral 3 Input
Peripheral 3 Output Enable
Peripheral 2 Output Enable
Peripheral 1 Output Enable
Peripheral 3 Output
Peripheral 2 Output
Peripheral 1 Output
Peripheral 2 Input
Peripheral 1 Input
N/C
GPxDIR (latch)
GPxDAT (latch)
Asynchronous
path
Asynchronous path
LPMCR0
GPIOLMPSEL
GPxCTRL
GPxQSEL1/2
GPIOXNMISEL
GPIOXINT7SEL
GPIOXINT3SEL
GPIOXINT2SEL
GPIOXINT1SEL
GPxSET
GPxCLEAR
GPxTOGGLE
00
00
00
PIE
SPRS516D – MARCH 2009 – REVISED AUGUST 2012
A.
x stands for the port, either A or B. For example, GPxDIR refers to either the GPADIR and GPBDIR register
depending on the particular GPIO pin selected.
depending on the particular GPIO pin selected.
B.
GPxDAT latch/read are accessed at the same memory location.
C.
This is a generic GPIO MUX block diagram. Not all options may be applicable for all GPIO pins. See the
TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature number
TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature number
) for pin-
specific variations.
Figure 4-16. GPIO MUX Block Diagram
Copyright © 2009–2012, Texas Instruments Incorporated
Peripherals
93
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