Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT 데이터 시트
제품 코드
PIC18F65J15-I/PT
PIC18F87J10 FAMILY
DS39663F-page 168
© 2009 Microchip Technology Inc.
16.2
Timer4 Interrupt
The Timer4 module has an 8-Bit Period register, PR4,
which is both readable and writable. Timer4 increments
from 00h until it matches PR4 and then resets to 00h on
the next increment cycle. The PR4 register is initialized
to FFh upon Reset.
which is both readable and writable. Timer4 increments
from 00h until it matches PR4 and then resets to 00h on
the next increment cycle. The PR4 register is initialized
to FFh upon Reset.
16.3
Output of TMR4
The output of TMR4 (before the postscaler) is used
only as a PWM time base for the CCP modules. It is not
used as a baud rate clock for the MSSP as is the
Timer2 output.
only as a PWM time base for the CCP modules. It is not
used as a baud rate clock for the MSSP as is the
Timer2 output.
FIGURE 16-1:
TIMER4 BLOCK DIAGRAM
TABLE 16-1:
REGISTERS ASSOCIATED WITH TIMER4 AS A TIMER/COUNTER
Comparator
TMR4 Output
TMR4
Postscaler
Prescaler
PR4
2
F
OSC
/4
1:1 to 1:16
1:1, 1:4, 1:16
4
T4OUTPS<3:0>
T4CKPS<1:0>
Set TMR4IF
Internal Data Bus
8
Reset
TMR4/PR4
8
8
(to PWM)
Match
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
IPR3
SSP2IP
BCL2IP
RC2IP
TX2IP
TMR4IP
CCP5IP
CCP4IP
CCP3IP
PIR3
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF
CCP5IF
CCP4IF
CCP3IF
55
PIE3
SSP2IE
BCL2IE
RC2IE
TX2IE
TMR4IE
CCP5IE
CCP4IE
CCP3IE
TMR4
Timer4 Register
T4CON
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0
PR4
Timer4 Period Register
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer4 module.