Texas Instruments TPS65280 Evaluation Model TPS65280EVM TPS65280EVM 데이터 시트
제품 코드
TPS65280EVM
V
SW_OUT 1
V
IN
12V
GND
V
SW_IN
V
SW_OUT 2
V
OUT
Nfault_1
Nfault_2
JP6:EN
SW1
JP5:EN
SW2
JP3, 4:
ROSC
ROSC
JP2:SS
JP1:EN
JP7:MODE
A
BENCH TEST SETUP CONDITIONS
4
BENCH TEST SETUP CONDITIONS
4.1
Headers Description and Jumper Placement
Figure 6. Headers Description and Jumper Placement
Test points:
(A) LX of V
OUT
4.2
Jumpers and Switches
Table 2. Jumpers and Switches
NO.
FUNCTION
PLACEMENT
COMMENT
Connect EN1 to GND to disable V
OUT
1, connect EN1 to Vin
JP1
Buck Enable (EN)
through a resistor to enable V
OUT
1; Leave open to enable
V
OUT
1.
Connect a external cap to this pin to program the soft start time
JP2
Soft Start (SS)
of the buck converter; leave this pin open to have default 1 ms
soft start time.
soft start time.
Connect a resistor to this pin to set the switching frequency;
JP3, 4
Switching Frequency
leave it open to set f
SW
to 600 kHz; connect it to ground to set
f
SW
to 300 kHz.
Connect this pin to high enable power switch 2; connect it to
JP5
Switch 2 Enable
ground to disable power switch 2; Leave it open to enable
Not recommend to leave open
power switch through internal 1.25-M
Ω
pull up resistor
Connect this pin to high enable power switch 1; connect it to
JP6
Switch 1 Enable
ground to disable power switch 1; Leave it open to enable
Not recommend to leave open
power switch through internal 1.25-M
Ω
pull up resistor.
Connect this pin to ground force the buck converter to run in
JP7
Sync/Mode
PWM mode; connect an external clock signal to this pin force
the buck converter to synchronize to the clock.
the buck converter to synchronize to the clock.
6
TPS65280EVM User’s Guide
SLVU722 – June 2012
Copyright © 2012, Texas Instruments Incorporated