Texas Instruments Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04805BEVAL/NOPB LMK04805BEVAL/NOPB 데이터 시트
제품 코드
LMK04805BEVAL/NOPB
L M K 0 4 8 X X E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
29
PLL1 Tab
Figure 11: PLL1 tab
Table 8: Registers Controls and Descriptions in PLL1 tab
Control Name
Register Name
Description
Reference Oscillator
Frequency (MHz)
Frequency (MHz)
n/a
CLKin frequency of the selected reference
clock.
clock.
Phase Detector Frequency
(MHz)
(MHz)
n/a
PLL1 Phase Detector Frequency (PDF).
This value is calculated as:
PLL1 PDF = CLKin Frequency / (PLL1_R *
CLKinX_PreR_DIV), where
CLKinX_PreR_DIV is the predivider value
of the selected input clock.
This value is calculated as:
PLL1 PDF = CLKin Frequency / (PLL1_R *
CLKinX_PreR_DIV), where
CLKinX_PreR_DIV is the predivider value
of the selected input clock.