Texas Instruments F28M36 Concerto Control Card TMDSCNCD28M36 TMDSCNCD28M36 데이터 시트
제품 코드
TMDSCNCD28M36
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
7.2.1.5
Frame Formats
Each data frame is between 4 bits and 16 bits long, depending on the size of data programmed, and is
transmitted starting with the MSB. Three basic frame types can be selected:
transmitted starting with the MSB. Three basic frame types can be selected:
•
Texas Instruments Synchronous Serial
•
Freescale SPI
•
MICROWIRE
For all three formats, the serial clock (SSIClk) is held inactive while the SSI is idle, and SSIClk transitions
at the programmed frequency only during active transmission or reception of data. The idle state of SSIClk
is utilized to provide a receive time-out indication that occurs when the receive FIFO still contains data
after a time-out period.
at the programmed frequency only during active transmission or reception of data. The idle state of SSIClk
is utilized to provide a receive time-out indication that occurs when the receive FIFO still contains data
after a time-out period.
Copyright © 2012–2014, Texas Instruments Incorporated
Peripheral Information and Timings
193
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