Texas Instruments F28M36 Concerto Control Card TMDSCNCD28M36 TMDSCNCD28M36 데이터 시트
제품 코드
TMDSCNCD28M36
M3
CPU
REGISTER
ACCESS
M3SSCLK
USBCLKENB
M3 CLOCKS
M3 NVIC
USBMAC_IRQ
INTR
USB
M3
uDMA
DMAxREQ
TX/RX FIFO
ACCESS
USBMAC REQ
PIN
USB0DM
PIN
PIN
PIN
G
P
IO
_
M
U
X
1
PACKET ENCODE
PACKET DECODE
CRC GEN/CHECK
PACKET
ENCODE / DECODE
CYCLE CONTROL
RX
BUFF
RX
BUFF
TX
BUFF
TX
BUFF
FIFO RAM CONTROLLER
TRANSMIT
RECEIVE
EP 0-31
CONTROL
COMBINE
ENDPOINTS
HOST TRANSACTION
SCHEDULER
ENDPOINT CONTROL
CPU
INTERFACE
INTERRUPT
CONTROL
EP REGISTER
DECODER
COMMON
REGS
CYCLE
CONTROL
FIFO DECODER
DATA SYNC
HNP / SRP
TIMERS
UTM
SYNCHRONIZATION
PIN
PIN
USB0DP
USB0VBUS
USB0ID
USB0EPEN
USB0PFLT
PHY
USBPLLCLK
(5V TOLERANT)
(5V TOLERANT)
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
Figure 7-25. USB
204
Peripheral Information and Timings
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