Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 데이터 시트
제품 코드
TMDSADAP180TO100
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
5
Device Operating Conditions
5.1
Absolute Maximum Ratings
(1) (2)
Supply voltage range, V
DDIO
(I/O and Flash)
with respect to V
SS
–0.3 V to 4.6 V
Supply voltage range, V
DD18
with respect to V
SS
–0.3 V to 2.5 V
Supply voltage range, V
DD12
with respect to V
SS
–0.3 V to 1.5 V
Analog voltage range, V
DDA
with respect to V
SSA
–0.3 V to 4.6 V
Input voltage range, V
IN
(3.3 V)
–0.3 V to 4.6 V
Output voltage range, V
O
–0.3 V to 4.6 V
Supply Ramp Rate (V
DDIO
, V
DD18
, V
DD12
, V
DDA
)
with respect to V
SS
< 10
5
V/s
Input clamp current, I
IK
(V
IN
< 0 or V
IN
> V
DDIO
)
(3)
±20 mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
DDIO
)
±20 mA
Free-Air temperature, T
A
–40°C to 125°C
Junction temperature range, T
J
(4)
–40°C to 150°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
only, and functional operation of the device at these or any other conditions beyond those indicated under
is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to V
SS
, unless otherwise noted.
(3)
Continuous clamp current per pin is ± 2 mA.
(4)
Long-term high-temperature storage or extended use at maximum temperature conditions may result in a reduction of overall device life.
For additional information, see IC Package Thermal Metrics Application Report (literature number
For additional information, see IC Package Thermal Metrics Application Report (literature number
) and Reliability Data for
TMS320LF24xx and TMS320F28xx Devices Application Report (literature number
5.2
Handling Ratings
MIN
MAX
UNIT
T
stg
Storage temperature range
(1)
–65
150
°C
V
ESD
(2)
Human Body Model (HBM) ESD Stress Voltage
(3)
–2
2
kV
Charged Device Model (CDM) ESD Stress Voltage
(4)
–500
500
V
(1)
Long-term high-temperature storage or extended use at maximum temperature conditions may result in a reduction of overall device life.
For additional information, see IC Package Thermal Metrics Application Report (literature number
For additional information, see IC Package Thermal Metrics Application Report (literature number
) and Reliability Data for
TMS320LF24xx and TMS320F28xx Devices Application Report (literature number
(2)
Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by assembly line electrostatic discharges into
the device.
the device.
(3)
Level listed is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows safe
manufacturing with a standard ESD control process, and manufacturing with less than 500-V HBM is possible if necessary precautions
are taken. Pins listed as 1000 V may actually have higher performance.
manufacturing with a standard ESD control process, and manufacturing with less than 500-V HBM is possible if necessary precautions
are taken. Pins listed as 1000 V may actually have higher performance.
(4)
Level listed is the passing level per EIA-JEDEC JESD22-C101E. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process, and manufacturing with less than 250-V CDM is possible if necessary precautions
are taken. Pins listed as 250 V may actually have higher performance.
manufacturing with a standard ESD control process, and manufacturing with less than 250-V CDM is possible if necessary precautions
are taken. Pins listed as 250 V may actually have higher performance.
Copyright © 2012–2014, Texas Instruments Incorporated
Device Operating Conditions
123
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