Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 데이터 시트
제품 코드
TMDSADAP180TO100
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
5.4
Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
I
OH
= I
OH
MAX
V
DDIO
* 0.8
V
OH
High-level output voltage
V
I
OH
= 50
μA
V
DDIO
– 0.2
V
OL
Low-level output voltage
I
OL
= I
OL
MAX
V
DDIO
* 0.2
V
All GPIO pins
–50
–230
Pin with pullup
V
DDIO
= 3.3 V, V
IN
= 0 V
XRS pin
–50
–230
enabled
Input current
I
IL
μA
ARS pin
–100
–400
(low level)
Pin with pulldown
V
DDIO
= 3.3 V, V
IN
= 0 V
±2
(1)
enabled
Pin with pullup
V
DDIO
= 3.3 V, V
IN
= V
DDIO
±2
(1)
enabled
Input current
I
IH
μA
(high level)
Pin with pulldown
V
DDIO
= 3.3 V, V
IN
= V
DDIO
50
200
enabled
Output current, pullup or
I
OZ
V
O
= V
DDIO
or 0 V
±2
(1)
μA
pulldown disabled
C
I
Input capacitance
2
pF
Digital Subsystem POR reset
Time after POR event is removed to XRS release
50
µs
release delay time
Analog Subsystem POR reset
Time after POR event is removed to ARS release
400
800
µs
release delay time
VREG V
DD18
output
Internal VREG18 on
1.77
1.935
V
VREG V
DD12
output
Internal VREG12 on
1.2
V
(1)
For GPIO38 and GPIO46 (USB OTG pins), this parameter is ±8 µA.
Copyright © 2012–2014, Texas Instruments Incorporated
Device Operating Conditions
125
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