Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 데이터 시트
제품 코드
TMDSADAP180TO100
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
Table 3-13. Master Subsystem Analog and EPI
µDMA
M Address
Master Subsystem
Size
C Address
C DMA Access
(2)
Access
(Byte-Aligned)
(1)
Analog and EPI
(Bytes)
(x16 Aligned)
(2)
5000 0000 – 5000 15FF
Reserved
yes
5000 1600 – 5000 161F
ADC1 Result Registers
32
5000 1620 – 5000 167F
Reserved
yes
5000 1680 – 5000 169F
ADC2 Result Registers
32
5000 16A0 – 5FFF FFFF
Reserved
EPI0
yes
6000 0000 – DFFF FFFF
(External Peripheral/Memory
2G
0030 0000 – 003F 7FFF
(3)
yes
Interface)
(1)
The letter "M" refers to the Master Subsystem.
(2)
The letter "C" refers to the Control Subsystem.
(3)
The Control Subsystem has no direct access to EPI in silicon revision 0 devices.
Table 3-14. Cortex-M3 Private Bus
µDMA
Cortex-M3 Address
Size
Cortex-M3 Private Bus
Access
(Byte-Aligned)
(Bytes)
no
E000 0000 – E000 0FFF
ITM (Instrumentation Trace Macrocell)
4K
no
E000 1000 – E000 1FFF
DWT (Data Watchpoint and Trace)
4K
no
E000 2000 – E000 2FFF
FPB (Flash Patch and Breakpoint)
4K
E000 3000 – E000 E007
Reserved
no
E000 E008 – E000 E00F
System Control Block
8
no
E000 E010 – E000 E01F
System Timer
16
E000 E020 – E000 E0FF
Reserved
no
E000 E100 – E000 E4EF
Nested Vectored Interrupt Controller (NVIC)
1008
E000 E4F0 – E000 ECFF
Reserved
no
E000 ED00 – E000 ED3F
System Control Block
64
E000 ED40 – E000 ED8F
Reserved
no
E000 ED90 – E000 EDB8
Memory Protection Unit
41
E000 EDB9 – E000 EEFF
Reserved
no
E000 EF00 – E000 EF03
Nested Vectored Interrupt Controller
4
E000 EF04 – FFFF FFFF
Reserved
20
Device Overview
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