Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 데이터 시트
제품 코드
TMDSADAP180TO100
CLPMCR0 REG
C28CPUCLK
C28NMIINT
TIMER 0
execution of IDLE instruction
activates the IDLES signal
ENTER
IDLE
MODE
ENTER
STANDBY
MODE
EXIT
IDLE
IDLE
MODE
EXIT
STANDBY
MODE
IDLES
LPM(0)
LPM(1)
R
e
q
u
e
st
s
T
o
W
a
k
e
F
ro
m
S
S
T
A
N
D
B
Y
M
o
d
e
R
e
q
u
e
st
s
T
o
W
a
ke
F
ro
m
ID
ID
LE
M
o
d
e
TINT2
TIMER 2
C28 XINT(3)
C28x NMI
EPWM (12)
C28 DMA
C28CLKENBx
LOSPCP REG
ECAP (6)
I C
2
C28LSPCLK
C28x CPU
‘0’
C28CLKIN
MASTER SUBSYSTEM
STANDBY
MODE
PLLSYSCLK
LPMWAKE
/32
/1
/2
/2
/4
…
/14
MTOCIPC(1)
IPC
LSPCLK
CLOCKFAIL
TIMER 1
TINT 1
C28x NMI
EQEP (3)
GPIO_MUX1
SCI
SPI
McBSP
T
M
R
2
C
LK
CPCLKCR3 REG
CPCLKCR1 REG
CPCLKCR0 REG
10MHZCLK
C28x
PIE
PIEINTRS (1)
OSCCLK
/1
/2
/4
/8
/4
/8
/16
OSCCLK
C28SYSCLK
10MHZCLK
CTMR2CLK
PRESCALE
TMR2CLKSRCSEL
CLKCTL REG
C28SYSCLK
GPIO_MUX1
PULSE
STRETCH
S
O
C
A
O
S
O
C
B
O
S
Y
N
C
O
OFF
/1
/2
/4
/8
/8
CCLKCTL REG
CLKDIV
ASYSCLK
A
N
A
LO
G
S
S
U
B
S
Y
S
T
E
M
SRXRST
ACIBRST
ASYSRST
C28x
PIE
PIEINTRS (12:1)
C28 FPU/VCU
CLPMSTAT REG
C28SYSCLK
LPM WAKEUP
LPMSEL1 REG
LPMSEL2 REG
SELECT QUALIFICATION
SELECT ONE OF 62 GPIs
SYSPLLSTAT REG
SYSPLLMULT REG
SYSPLLCTL REG
SYSDIVSEL REG
CCLKREQUEST REG
M3SSCLK
GPI (63:0)
CLKOFF REG
GPIO_MUX1
/4
XCLKOUT
P
F
2
_
G
P
IO
3
4
C28SYSCLK
C28SYSCLK
0
1
2
3
XPLLCLKCFG REG
XPLLCLKOUTDIV
OFF
/4
/2
/1
/1
OFF
CXCLK REG
XCLKOUTDIV
(NOTE: IN REVISION 0 OF SILICON, XCLKOUT = PLLSYSCLK DIVIDED DOWN BY 1, 2 OR 4)
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
Figure 3-12. C28x Clocks and Low-Power Modes
Copyright © 2012–2014, Texas Instruments Incorporated
Device Overview
61
Product Folder Links: