Texas Instruments PCM4202 Evaluation Module PCM4202EVM PCM4202EVM 데이터 시트
제품 코드
PCM4202EVM
www.ti.com
J1
Left Channel
Input
J2
Right Channel
Input
Analog
Input Buffers
OPA1632 x 2
U1
PCM4202
BUF
S/M
PCM Data
Switch
SW1
Switch
SW3
G
N
D
To
DIT Circuitry
J3
+5VA
−
15V
+15V
BUF
DIT
U12
DIT4192
J5
AES3 Out #1
Stereo: L + R
Mono: L
HDR
J4
Audio
Serial Port
U6
REG1117
+3.3V
+
1
5
G
N
D
−
1
5
G
N
D
+
5
V
A
U13
DIT4192
J6
AES3 Out #2
Stereo: L + R
Mono: R
X1
22.5792M
J7
EXT CLOCK INPUT
Switch
SW5
System
Clock
To
Clock Enables
X2
24.576M
J8
+5VD
+
5
V
D
G
N
D
+
3
.3
V
D
+3.3V
JMP3
Introduction
Figure 2. PCM4202EVM Functional Block Diagram
Two differential analog inputs are supported at connectors J1 and J2, corresponding to Left and
Right analog input channels, respectively. These connectors support either 3-pin male XLR or
balanced TRS input plugs. Each of the analog inputs is buffered and filtered using a low noise input
circuit, utilizing a Texas Instruments OPA1632 fully differential amplifier. The output of each buffer
circuit is connected to a corresponding differential input of the PCM4202. The PCM4202 is then
used to convert the analog signal to either a 24-bit linear PCM or 1-bit DSD representation in the
digital domain.
Right analog input channels, respectively. These connectors support either 3-pin male XLR or
balanced TRS input plugs. Each of the analog inputs is buffered and filtered using a low noise input
circuit, utilizing a Texas Instruments OPA1632 fully differential amplifier. The output of each buffer
circuit is connected to a corresponding differential input of the PCM4202. The PCM4202 is then
used to convert the analog signal to either a 24-bit linear PCM or 1-bit DSD representation in the
digital domain.
The 24-bit PCM or 1-bit DSD data output is made available at header J4. The 24-bit PCM audio
data is also made available at the AES3 encoded data outputs provided at RCA jacks J5 and J6.
The buffered header is convenient for interfacing to external development hardware or digital signal
processors, while the AES3 encoded outputs may be connected to audio test systems or
commercial audio equipment.
data is also made available at the AES3 encoded data outputs provided at RCA jacks J5 and J6.
The buffered header is convenient for interfacing to external development hardware or digital signal
processors, while the AES3 encoded outputs may be connected to audio test systems or
commercial audio equipment.
Power is connected to the board at either terminal block J3 for the analog supplies, or at terminal
block J8 for the digital supplies.
block J8 for the digital supplies.
PCM4202EVM User's Guide
SBAU103 – August 2004
5