Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 38: AES Dirty Bits (AES_DIRTYBITS), offset 0x094
This register can be used to identify if AES registers have been read or written to.
AES Dirty Bits (AES_DIRTYBITS)
Base 0x4403.6000
Offset 0x094
Type RW1C, reset 0x0000.0000
Offset 0x094
Type RW1C, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
S_ACCESS
S_DIRTY
reserved
RW1C
RW1C
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
R
reserved
31:2
AES Dirty Bit
This bit must be written to a 1 to clear.
Description
Value
No AES registers have been written.
0
Indicates when any of the AES_x registers have been written
(except for the AES_DIRTYBITS register).
(except for the AES_DIRTYBITS register).
1
0
RW1C
S_DIRTY
1
AES Access Bit
This bit must be written to a 1 to clear.
Description
Value
No AES registers have been read.
0
Indicates when any of the AES_x registers have been read
(except for the AES_DIRTYBITS register).
(except for the AES_DIRTYBITS register).
1
0
RW1C
S_ACCESS
0
13.7
AES µDMA Interrupt Register Descriptions (CCM Offset)
This section lists and describes the AES µDMA registers, in numerical order by address offset.
Registers in this section are relative to the base address of 0x4403.0000.
Registers in this section are relative to the base address of 0x4403.0000.
1031
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller