Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
lowest-numbered byte, and the most-significant byte (msbyte) stored at the highest-numbered byte.
Figure 2-5 on page 121 illustrates how data is stored.
Figure 2-5 on page 121 illustrates how data is stored.
Figure 2-5. Data Storage
Memory
Register
Address A
A+1
lsbyte
msbyte
A+2
A+3
0
7
B0
B1
B3
B2
31
24 23
16 15
8 7
0
B0
B1
B2
B3
2.4.7
Synchronization Primitives
The Cortex-M4F instruction set includes pairs of synchronization primitives which provide a
non-blocking mechanism that a thread or process can use to obtain exclusive access to a memory
location. Software can use these primitives to perform a guaranteed read-modify-write memory
update sequence or for a semaphore mechanism.
non-blocking mechanism that a thread or process can use to obtain exclusive access to a memory
location. Software can use these primitives to perform a guaranteed read-modify-write memory
update sequence or for a semaphore mechanism.
Note:
The available pairs of synchronization primitives are only available for single processor use
and should not be used with multi-processor systems.
and should not be used with multi-processor systems.
A pair of synchronization primitives consists of:
■ A Load-Exclusive instruction, which is used to read the value of a memory location and requests
exclusive access to that location.
■ A Store-Exclusive instruction, which is used to attempt to write to the same memory location and
returns a status bit to a register. If this status bit is clear, it indicates that the thread or process
gained exclusive access to the memory and the write succeeds; if this status bit is set, it indicates
that the thread or process did not gain exclusive access to the memory and no write was
performed.
gained exclusive access to the memory and the write succeeds; if this status bit is set, it indicates
that the thread or process did not gain exclusive access to the memory and no write was
performed.
The pairs of Load-Exclusive and Store-Exclusive instructions are:
■ The word instructions
LDREX
and
STREX
■ The halfword instructions
LDREXH
and
STREXH
■ The byte instructions
LDREXB
and
STREXB
Software must use a Load-Exclusive instruction with the corresponding Store-Exclusive instruction.
To perform an exclusive read-modify-write of a memory location, software must:
1.
Use a Load-Exclusive instruction to read the value of the location.
2.
Modify the value, as required.
3.
Use a Store-Exclusive instruction to attempt to write the new value back to the memory location.
4.
Test the returned status bit.
121
December 13, 2013
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TM4C129XNCZAD Microcontroller