Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 1: CAN Control (CANCTL), offset 0x000
This control register initializes the module and enables test mode and interrupts.
The bus-off recovery sequence (see CAN Specification Rev. 2.0) cannot be shortened by setting
or clearing
or clearing
INIT
. If the device goes bus-off, it sets
INIT
, stopping all bus activities. Once
INIT
has been cleared by the CPU, the device then waits for 129 occurrences of Bus Idle (129 * 11
consecutive High bits) before resuming normal operations. At the end of the bus-off recovery
sequence, the Error Management Counters are reset.
consecutive High bits) before resuming normal operations. At the end of the bus-off recovery
sequence, the Error Management Counters are reset.
During the waiting time after
INIT
is cleared, each time a sequence of 11 High bits has been
monitored, a BITERROR0 code is written to the CANSTS register (the
LEC
field = 0x5), enabling
the CPU to readily check whether the CAN bus is stuck Low or continuously disturbed, and to monitor
the proceeding of the bus-off recovery sequence.
the proceeding of the bus-off recovery sequence.
CAN Control (CANCTL)
CAN0 base: 0x4004.0000
CAN1 base: 0x4004.1000
Offset 0x000
Type RW, reset 0x0000.0001
CAN1 base: 0x4004.1000
Offset 0x000
Type RW, reset 0x0000.0001
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
INIT
IE
SIE
EIE
reserved
DAR
CCE
TEST
reserved
RW
RW
RW
RW
RO
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
Type
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00
RO
reserved
31:8
Test Mode Enable
Description
Value
The CAN controller is operating normally.
0
The CAN controller is in test mode.
1
0
RW
TEST
7
Configuration Change Enable
Description
Value
Write accesses to the CANBIT register are not allowed.
0
Write accesses to the CANBIT register are allowed if the
INIT
bit is 1.
1
0
RW
CCE
6
Disable Automatic-Retransmission
Description
Value
Auto-retransmission of disturbed messages is enabled.
0
Auto-retransmission is disabled.
1
0
RW
DAR
5
December 13, 2013
1556
Texas Instruments-Advance Information
Controller Area Network (CAN) Module