Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 8: CAN IF1 Command Request (CANIF1CRQ), offset 0x020
Register 9: CAN IF2 Command Request (CANIF2CRQ), offset 0x080
A message transfer is started as soon as there is a write of the message object number to the
MNUM
field when the
TXRQST
bit in the CANIF1MCTL register is set. With this write operation, the
BUSY
bit is automatically set to indicate that a transfer between the CAN Interface Registers and the
internal message RAM is in progress. After a wait time of 3 to 6
internal message RAM is in progress. After a wait time of 3 to 6
CAN_CLK
periods, the transfer
between the interface register and the message RAM completes, which then clears the
BUSY
bit.
CAN IFn Command Request (CANIFnCRQ)
CAN0 base: 0x4004.0000
CAN1 base: 0x4004.1000
Offset 0x020
Type RW, reset 0x0000.0001
CAN1 base: 0x4004.1000
Offset 0x020
Type RW, reset 0x0000.0001
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MNUM
reserved
BUSY
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000
RO
reserved
31:16
Busy Flag
Description
Value
This bit is cleared when read/write action has finished.
0
This bit is set when a write occurs to the message
number in this register.
number in this register.
1
0
RO
BUSY
15
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00
RO
reserved
14:6
Message Number
Selects one of the 32 message objects in the message RAM for data
transfer. The message objects are numbered from 1 to 32.
transfer. The message objects are numbered from 1 to 32.
Description
Value
Reserved
0 is not a valid message number; it is interpreted
as 0x20, or object 32.
as 0x20, or object 32.
0x00
Message Number
Indicates specified message object 1 to 32.
0x01-0x20
Reserved
Not a valid message number; values are shifted and
it is interpreted as 0x01-0x1F.
it is interpreted as 0x01-0x1F.
0x21-0x3F
0x01
RW
MNUM
5:0
1567
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller