Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Table 24-36. Ethernet Register Map (continued)
See
page
Description
Reset
Type
Name
Offset
Ethernet PHY MII Interrupt Status 2 - MR19
0x0000
RW
EPHYMISR2
-
Ethernet PHY False Carrier Sense Counter - MR20
0x0000
RO
EPHYFCSCR
-
Ethernet PHY Receive Error Count - MR21
0x0000.0000
RO
EPHYRXERCNT
-
Ethernet PHY BIST Control - MR22
0x0100
RW
EPHYBISTCR
-
Ethernet PHY LED Control - MR24
0x0400
RW
EPHYLEDCR
-
Ethernet PHY Control - MR25
0x8000
RW
EPHYCTL
-
Ethernet PHY 10Base-T Status/Control - MR26
0x0000
RW
EPHY10BTSC
-
Ethernet PHY BIST Control and Status 1 - MR27
0x007D
RW
EPHYBICSR1
-
Ethernet PHY BIST Control and Status 2 - MR28
0x05EE
RW
EPHYBICSR2
-
Ethernet PHY Cable Diagnostic Control - MR30
0x0102
RO
EPHYCDCR
-
Ethernet PHY Reset Control - MR31
0x0000
RW
EPHYRCR
-
Ethernet PHY LED Configuration - MR37
0x0000.0510
RW
EPHYLEDCFG
-
24.7
Ethernet MAC Register Descriptions
This section lists and describes the MAC registers, in numerical order by address offset. Also see
“Ethernet PHY Register Descriptions” on page 1783.
“Ethernet PHY Register Descriptions” on page 1783.
1661
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller