Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 9: Ethernet MAC Status (EMACSTATUS), offset 0x024
The Ethernet MAC Status (EMACSTATUS) register gives the status of all main modules of the
transmit and receive data-paths and the FIFOs. An all-zero status indicates that the MAC is in idle
state (and FIFOs are empty) and no activity is going on in the data-paths.
transmit and receive data-paths and the FIFOs. An all-zero status indicates that the MAC is in idle
state (and FIFOs are empty) and no activity is going on in the data-paths.
Ethernet MAC Status (EMACSTATUS)
Base 0x400E.C000
Offset 0x024
Type RO, reset 0x0000.0000
Offset 0x024
Type RO, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
TPE
TFC
TXPAUSED
TRC
TWC
reserved
TXFE
TXFF
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RPE
RFCFC
reserved
RWC
RRC
reserved
RXF
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00
RO
reserved
31:26
TX/RX Controller TX FIFO Full Status
Description
Value
The TX/RX Controller TX FIFO is not full.
0
The TX/RX Controller TX FIFO is full. Therefore, the TX/RX
Controller cannot accept any more frames for transmission.
Controller cannot accept any more frames for transmission.
1
0
RO
TXFF
25
TX/RX Controller TX FIFO Not Empty Status
Description
Value
TX/RX Controller TX FIFO is empty.
0
TX/RX Controller TX FIFO is not empty and some data is left
for transmission.
for transmission.
1
0
RO
TXFE
24
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
RO
reserved
23
TX/RX Controller TX FIFO Write Controller Active Status
Description
Value
TX/RX Controller's TX FIFO write controller is inactive.
0
TX/RX Controller's TX FIFO write controller is active and
transferring data to the TX FIFO.
transferring data to the TX FIFO.
1
0
RO
TWC
22
1683
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller