Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트

제품 코드

DK-TM4C129X

Register 40: Interrupt 64-67 Priority (PRI16), offset 0x440

Register 41: Interrupt 68-71 Priority (PRI17), offset 0x444

Register 42: Interrupt 72-75 Priority (PRI18), offset 0x448

Register 43: Interrupt 76-79 Priority (PRI19), offset 0x44C

Register 44: Interrupt 80-83 Priority (PRI20), offset 0x450

Register 45: Interrupt 84-87 Priority (PRI21), offset 0x454

Register 46: Interrupt 88-91 Priority (PRI22), offset 0x458

Register 47: Interrupt 92-95 Priority (PRI23), offset 0x45C

Register 48: Interrupt 96-99 Priority (PRI24), offset 0x460

Register 49: Interrupt 100-103 Priority (PRI25), offset 0x464

Register 50: Interrupt 104-107 Priority (PRI26), offset 0x468

Register 51: Interrupt 108-111 Priority (PRI27), offset 0x46C

Register 52: Interrupt 112-113 Priority (PRI28), offset 0x470

Note:

This register can only be accessed from privileged mode.

The PRIn registers (see also page 169) provide 3-bit priority fields for each interrupt. These registers
are byte accessible. Each register holds four priority fields that are assigned to interrupts as follows:

Interrupt

PRIn Register Bit Field

Interrupt [4n+3]

Bits 31:29

Interrupt [4n+2]

Bits 23:21

Interrupt [4n+1]

Bits 15:13

Interrupt [4n]

Bits 7:5

See Table 2-9 on page 125 for interrupt assignments.

Each priority level can be split into separate group priority and subpriority fields. The

PRIGROUP

field in the Application Interrupt and Reset Control (APINT) register (see page 181) indicates the
position of the binary point that splits the priority and subpriority fields .

These registers can only be accessed from privileged mode.

Note:

Because the last interrupt vector is number 113, bits [31:16] of the PRI28 register are
reserved.

171

December 13, 2013

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TM4C129XNCZAD Microcontroller