Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 35: Ethernet MAC Receive Frame Count for Good Unicast Frames
(EMACRXCNTGUNI), offset 0x1C4
(EMACRXCNTGUNI), offset 0x1C4
This register maintains the number of received good unicast frames.
Note:
This counter is reset to all zeros by setting the
CNTRST
bit in the Ethernet MAC MMC
Control (EMACMMCCTRL), offset 0x100.
Ethernet MAC Receive Frame Count for Good Unicast Frames (EMACRXCNTGUNI)
Base 0x400E.C000
Offset 0x1C4
Type RO, reset 0x0000.0000
Offset 0x1C4
Type RO, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RXUCASTG
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RXUCASTG
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
This field indicates the number of received good unicast frames.
0x0
RO
RXUCASTG
31:0
December 13, 2013
1722
Texas Instruments-Advance Information
Ethernet Controller