Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 52: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068
Register 53: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8
Register 54: PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8
Register 55: PWM3 Dead-Band Control (PWM3DBCTL), offset 0x128
The PWMnDBCTL register controls the dead-band generator, which produces the
MnPWMn
signals
based on the pwmA and pwmB signals. When disabled, the pwmA signal passes through to the
pwmA' signal and the pwmB signal passes through to the pwmB' signal. When dead-band control
is enabled, the pwmB signal is ignored, the pwmA' signal is generated by delaying the rising edge(s)
of the pwmA signal by the value in the PWMnDBRISE register (see page 1993), and the pwmB' signal
is generated by inverting the pwmA signal and delaying the falling edge(s) of the pwmA signal by
the value in the PWMnDBFALL register (see page 1994). The Output Control block outputs the pwm0A'
signal on the
pwmA' signal and the pwmB signal passes through to the pwmB' signal. When dead-band control
is enabled, the pwmB signal is ignored, the pwmA' signal is generated by delaying the rising edge(s)
of the pwmA signal by the value in the PWMnDBRISE register (see page 1993), and the pwmB' signal
is generated by inverting the pwmA signal and delaying the falling edge(s) of the pwmA signal by
the value in the PWMnDBFALL register (see page 1994). The Output Control block outputs the pwm0A'
signal on the
MnPWM0
signal and the pwm0B' signal on the
MnPWM1
signal. In a similar manner,
MnPWM2
and
MnPWM3
are produced from the pwm1A' and pwm1B' signals,
MnPWM4
and
MnPWM5
are produced from the pwm2A' and pwm2B' signals, and
MnPWM6
and
MnPWM7
are produced from
the pwm3A' and pwm3B' signals.
If the Dead-Band Control mode is immediate (based on the
DBCTLUPD
field encoding in the
PWMnCTL register), the
ENABLE
bit value is used immediately. If the update mode is locally
synchronized, this value is used the next time the counter reaches zero. If the update mode is
globally synchronized, this value is used the next time the counter reaches zero after a synchronous
update has been requested through the PWM Master Control (PWMCTL) register (see page 1945).
If this register is rewritten before the actual update occurs, the previous value is never used and is
lost.
globally synchronized, this value is used the next time the counter reaches zero after a synchronous
update has been requested through the PWM Master Control (PWMCTL) register (see page 1945).
If this register is rewritten before the actual update occurs, the previous value is never used and is
lost.
PWMn Dead-Band Control (PWMnDBCTL)
PWM0 base: 0x4002.8000
Offset 0x068
Type RW, reset 0x0000.0000
Offset 0x068
Type RW, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
ENABLE
reserved
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000
RO
reserved
31:1
Dead-Band Generator Enable
Description
Value
The pwmA and pwmB signals pass through to the pwmA' and
pwmB' signals unmodified.
pwmB' signals unmodified.
0
The dead-band generator modifies the pwmA signal by inserting
dead bands into the pwmA' and pwmB' signals.
dead bands into the pwmA' and pwmB' signals.
1
0
RW
ENABLE
0
December 13, 2013
1992
Texas Instruments-Advance Information
Pulse Width Modulator (PWM)