Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Table 32-46. SSI Characteristics (continued)
Unit
Max
Nom
Min
Parameter Name
Parameter
Parameter
No.
No.
ns
-
-
8.33
SSIClk
high time, as master
T
CLK_HIGH
S2
ns
-
-
50
SSIClk
high time, as slave
ns
-
-
8.33
SSIClk
low time, as master
T
CLK_LOW
S3
ns
-
-
50
SSIClk
low time, as slave
ns
-
-
1.25
SSIClk
rise time
c
T
CLKR
S4
ns
-
-
1.25
SSIClk
fall time
c
T
CLKF
S5
ns
4.00
-
-
Master Mode: Master Tx Data Output (to slave)
Valid Time from edge of SSIClk
Valid Time from edge of SSIClk
T
TXDMOV
S6
ns
-
-
0.60
Master Mode: Master Tx Data Output (to slave)
Hold Time after next SSIClk
Hold Time after next SSIClk
T
TXDMOH
S7
ns
-
-
7.89
Master Mode: Master Rx Data In (from slave)
setup time
setup time
T
RXDMS
S8
ns
-
-
0
Master Mode: Master Rx Data In (from slave) hold
time
time
T
RXDMH
S9
ns
47.60
d
-
-
Slave Mode: Master Tx Data Output (to Master)
Valid Time from edge of SSIClk
Valid Time from edge of SSIClk
T
TXDSOV
S10
ns
-
-
37.4
e
Slave Mode: Slave Tx Data Output (to Master)
Hold Time from next SSIClk
Hold Time from next SSIClk
T
TXDSOH
S11
ns
-
-
0
Slave Mode: Rx Data In (from master) setup time
T
RXDSSU
S13
ns
-
-
37.03
f
Slave Mode: Rx Data In (from master) hold time
T
RXDSH
S14
a. In master mode, the system clock must be at least twice as fast as the SSIClk.
b. In slave mode, the system clock must be at least 12 times faster than the SSIClk.
c. Note that the delays shown are using 12-mA drive strength.
d. This MAX value is for the minimum slave mode T
SYSCLK
period (8.33 ns). To find the MAX T
TXDSOV
value for a larger
T
SYSCLK
, use the equation: 4*T
SYSCLK
+14.25.
e. This MIN value is for the minimum slave mode T
SYSCLK
(8.33 ns). To find the MIN T
TXDSOH
value for a larger T
SYSCLK
,
use the equation: 4*T
SYSCLK
+4.08.
f. This MIN value is for the minimum slave mode T
SYSCLK
(8.33 ns). To find the MIN T
TXDSH
value for a larger T
SYSCLK
, use
the equation: 4*T
SYSCLK
+3.70.
Figure 32-30. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement
SSIClk
SSIFss
SSITx
SSIRx
MSB
LSB
S2
S3
S1
S5
4 to 16 bits
S4
2143
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller