Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Figure 7-5. Counter Behavior with a TRIM Value of 0x8002
RTCCLK
RTCC[6:0]
RTCSSC
0x00
0x7FFD 0x7FFE
0x01
0x02
0x7FFF 0x7FFD 0x7FFE 0x7FFF
0x7FFE 0x7FFF
0x0
0x1
0x0
In the case of a trim value below 0x7FFF, the
RTCSSC
value is advanced from 0x7FFF to the trim
value while the
RTCC
value is incremented from 0x0 to 0x1. If the match value is within that range,
the match interrupt is not triggered. For example, as shown in Figure 7-6 on page 572, if the match
interrupt was configured with
interrupt was configured with
RTCM0
=0x1 and
RTCSSM
=0x2,an interrupt would never be triggered.
Figure 7-6. Counter Behavior with a TRIM Value of 0x7FFC
RTCCLK
RTCC[6:0]
RTCSSC
0x00
0x7FFD 0x7FFE
0x01
0x7FFF 0x7FFD 0x7FFE 0x7FFF
7.3.6
Tamper
The Tamper module provides a user with mechanisms to detect, respond to, and log system
tampering events. The Tamper module is designed to be low power and operate either from a battery
or the MCU I/O voltage supply. This module is a sub-module of the Hibernate module.
tampering events. The Tamper module is designed to be low power and operate either from a battery
or the MCU I/O voltage supply. This module is a sub-module of the Hibernate module.
7.3.6.1
Tamper Block Diagram
Figure 7-7 on page 572 shows the Tamper block diagram.
Figure 7-7. Tamper Block Diagram
HIBTPSTAT
Control
XOSC0
Tamper Log
HIBTPLOG
Tamper Event NMI
TMPR[3:0]
HIBTPCTL
HIBTPIO
Tamper Detect
and Filter
XOSC Fail
Detector
RTC
BBRAM Clear
HIB Wake
HIBTPCTL.TPEN
HIBTPCTL.TPEN
December 13, 2013
572
Texas Instruments-Advance Information
Hibernation Module