Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트

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제품 코드

DK-TM4C129X

Register 52: Flash Memory Protection Program Enable 0 (FMPPE0), offset
0x400

Register 53: Flash Memory Protection Program Enable 1 (FMPPE1), offset
0x404

Register 54: Flash Memory Protection Program Enable 2 (FMPPE2), offset
0x408

Register 55: Flash Memory Protection Program Enable 3 (FMPPE3), offset
0x40C

Register 56: Flash Memory Protection Program Enable 4 (FMPPE4), offset
0x410

Register 57: Flash Memory Protection Program Enable 5 (FMPPE5), offset
0x414

Register 58: Flash Memory Protection Program Enable 6 (FMPPE6), offset
0x418

Register 59: Flash Memory Protection Program Enable 7 (FMPPE7), offset
0x41C

Register 60: Flash Memory Protection Program Enable 8 (FMPPE8), offset
0x420

Register 61: Flash Memory Protection Program Enable 9 (FMPPE9), offset
0x424

Register 62: Flash Memory Protection Program Enable 10 (FMPPE10), offset
0x428

Register 63: Flash Memory Protection Program Enable 11 (FMPPE11), offset
0x42C

Register 64: Flash Memory Protection Program Enable 12 (FMPPE12), offset
0x430

Register 65: Flash Memory Protection Program Enable 13 (FMPPE13), offset
0x434

Register 66: Flash Memory Protection Program Enable 14 (FMPPE14), offset
0x438

Register 67: Flash Memory Protection Program Enable 15 (FMPPE15), offset
0x43C

Note:

The FMPPE0 register is aliased for backwards compatibility.

Note:

Offset is relative to System Control base address of 0x400FE000.

This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the
read-only protection bits). Since the memory is two-way interleaved and each bank individually is
an 8-KB sector, read-only protection must occur across a block size of 16-KB. No smaller block size

December 13, 2013

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Texas Instruments-Advance Information

Internal Memory