Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
AUX_MXI/
AUX_CLKIN
2
3
4
4
5
1
1
SPRS605C – JULY 2009 – REVISED JUNE 2012
Table 7-13. Timing Requirements for AUX_MXI/AUX_CLKIN
(1) (2) (3)
(see
)
-1G
NO.
UNIT
MIN
NOM
MAX
1
t
c(AMXI)
Cycle time, AUX_MXI/AUX_CLKIN
41.6 or 20.83
(4)
ns
2
t
w(AMXIH)
Pulse duration, AUX_MXI/AUX_CLKIN high
0.45C
0.55C
ns
3
t
w(AMXIL)
Pulse duration, AUX_MXI/AUX_CLKIN low
0.45C
0.55C
ns
4
t
t(AMXI)
Transition time, AUX_MXI/AUX_CLKIN
7
ns
5
t
J(AMXI)
Period jitter, AUX_MXI/AUX_CLKIN
0.02C
ns
6
S
f
Frequency stability, AUX_MXI/AUX_CLKIN
(4)
± 50
ppm
(1)
The reference points for the rise and fall transitions are measured at V
IL
MAX and V
IH
MIN.
(2)
For more details on the PLL, see the TMS320DM646x DMSoC Universal Serial Bus (USB) Controller User's Guide (Literature Number
(3)
C = DEV_CLKIN cycle time in ns. For example, when AUX_MXI/AUX_CLKIN frequency is 24 MHz, use C = 41.6 ns and when
AUX_MXI/AUX_CLKIN frequency is 48 MHz, use C = 20.83 ns.
AUX_MXI/AUX_CLKIN frequency is 48 MHz, use C = 20.83 ns.
(4)
If the USB is used, a 24-MHz, 50-ppm crystal is recommended.
Figure 7-16. AUX_MXI/AUX_CLKIN Timing
160
Peripheral Information and Electrical Specifications
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