Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
11
1
13
2
3
12
5
HCS (input)
HAS
(D)
(input)
HSTROBE
(A)(C)
(input)
HR/W (input)
HRDY
(B)
(output)
HD[31:0] (input)
HCNTL[1:0] (input)
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and
the state of the FIFO, transitions on HRDY may or may not occur.
For more detailed information on the HPI peripheral, see the TMS320DM646x DMSoC Host Port Interface (HPI) User’s Guide
(literature number SPRUES1).
C. HCS reflects typical HCS behavior when HSTROBE assertion is caused by HDS1 or HDS2. HCS timing requirements are reflected
by parameters for HSTROBE.
D. For proper HPI operation, HAS must be pulled up via an external resistor.
SPRS605C – JULY 2009 – REVISED JUNE 2012
Figure 7-61. HPI32 Write Timing (HAS Not Used, Tied High)
268
Peripheral Information and Electrical Specifications
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