Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
4
Device Configurations
4.1
System Module Registers
The system module includes status and control registers for configuration of the device.Brief descriptions
of the various registers are shown in
of the various registers are shown in
. System Module registers required for device
configurations are discussed in the following sections.
Table 4-1. System Module Register Memory Map
HEX ADDRESS RANGE
REGISTER ACRONYM
DESCRIPTION
0x01C4 0000
PINMUX0
Pin Multiplexing Control 0 (see
, PINMUX0 Register).
0x01C4 0004
PINMUX1
Pin Multiplexing Control 1 (see
, PINMUX1 Register).
0x01C4 0008
DSPBOOTADDR
DSP Boot Address. Decoded by bootloader software for host boots.
(See
(See
, DSPBOOTADDR Register.)
0x01C4 000C
SUSPSRC
Emulator Suspend Source (see
, Emulation Control).
0x01C4 0010
BOOTSTAT
Boot Status (see
, BOOTSTAT Register).
0x01C4 0014
BOOTCFG
Device Boot Configuration (see
, BOOTCFG Register).
0x01C4 0018
–
Reserved
0x01C4 001C - 0x01C4 0020
–
Reserved
0x01C4 0024
ARMBOOT
ARM926 Boot Control (see
, ARMBOOT Register).
0x01C4 0028
JTAGID
Device ID Number [see
, JTAG ID (JTAGID) Register
Description(s)].
0x01C4 002C
–
Reserved
0x01C4 0030
HPICTL
HPI Control (see
, HPICTL Register).
0x01C4 0034
USBCTL
USB Control (see
, USBCTL Register).
0x01C4 0038
VIDCLKCTL
Video Clock Control (see
, Video Clock Control).
0x01C4 003C
MSTPRI0
Bus Master Priority Control 0 (see
, Switch Central
Resource (SCR) Bus Priorities).
0x01C4 0040
MSTPRI1
Bus Master Priority Control 1 (see
, Switch Central
Resource (SCR) Bus Priorities).
0x01C4 0044
MSTPRI2
Bus Master Priority Control 2 (see
, Switch Central
Resource (SCR) Bus Priorities).
0x01C4 0048
VDD3P3V_PWDN
V
DD
3.3-V I/O Powerdown Control (see
, Power
Considerations).
0x01C4 004C
–
Reserved
0x01C4 0050
TSIFCTL
TSIF Control Register (see
, TSIF Control).
0x01C4 0054
PWMCTL
PWM Control (see
, PWM (Trigger Source) Control
Register).
0x01C4 0058
EDMATCCFG
EDMA TC Configuration (see
, EDMATCCFG
Register).
0x01C4 005C
CLKCTL
Oscillator and Output Clock Control (see
, Clock and
Oscillator Control).
0x01C4 0060
DSPINT
ARM to DSP Interrupt Status (see
, ARM/DSP
Communications Interrupts).
0x01C4 0064
DSPINTSET
ARM to DSP Interrupt Set (see
, ARM/DSP
Communications Interrupts).
0x01C4 0068
DSPINTCLR
ARM to DSP Interrupt Clear (see
, ARM/DSP
Communications Interrupts).
0x01C4 006C
VSCLKDIS
Video and TSIF Clock Disable (see
, Video and TSIF
Clock Disable).
0x01C4 0070
ARMINT
DSP to ARM Interrupt Status (see
, ARM/DSP
Communications Interrupts).
0x01C4 0074
ARMINTSET
DSP to ARM Interrupt Set (see
, ARM/DSP
Communications Interrupts).
Copyright © 2009–2012, Texas Instruments Incorporated
Device Configurations
81
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