Texas Instruments CC2650DK 사용자 설명서
SSIn_Clk
SSIn_Fss
SSIn_Rx
0
SSIn_Tx
8-bit control
4 to 16 bits
output data
output data
LSB
MSB
MSB
LSB
SSIn_Clk
SSIn_Fss
SSIn_Rx
SSIn_Tx
Q
MSB
MSB
LSB
LSB
4 to 16 bits
Q
Functional Description
Figure 20-9. Motorola SPI Frame Format With SPO = 1 and SPH = 1
Note: Q is undefined.
In this configuration, during idle periods:
•
SSIClk is forced high.
•
SSIn_FSS is forced high.
•
The transmit data line SSIn_TX is arbitrarily forced low.
•
When the SSI is configured as a master, it enables the SSIn_CLK pad.
•
When the SSI is configured as a slave, it disables the SSIn_CLK pad.
If the SSI is enabled and valid data is in the TX FIFO, the start of transmission is signified by the
SSIn_FSS master signal going low. The master SSIn_TX output pad is enabled. After an additional one-
half SSIn_CLK period, both master and slave data are enabled onto their respective transmission lines. At
the same time, SSIn_CLK is enabled with a falling-edge transition. Data is then captured on the rising
edges and propagated on the falling edges of the SSIn_CLK signal.
SSIn_FSS master signal going low. The master SSIn_TX output pad is enabled. After an additional one-
half SSIn_CLK period, both master and slave data are enabled onto their respective transmission lines. At
the same time, SSIn_CLK is enabled with a falling-edge transition. Data is then captured on the rising
edges and propagated on the falling edges of the SSIn_CLK signal.
For a single word transmission, after all bits are transferred, the SSIn_FSS line returns to its IDLE high
state one SSIn_CLK period after the last bit is captured.
state one SSIn_CLK period after the last bit is captured.
For continuous back-to-back transmissions, the SSIn_FSS pin remains in its active low state until the final
bit of the last word is captured and then returns to its IDLE state.
bit of the last word is captured and then returns to its IDLE state.
For continuous back-to-back transfers, the SSIn_FSS pin is held low between successive data words and
terminates like a single-word transfer.
terminates like a single-word transfer.
20.4.4.7 MICROWIRE Frame Format
shows the MICROWIRE frame format for a single frame.
shows the same
format when back-to-back frames are transmitted.
Figure 20-10. MICROWIRE Frame Format (Single Frame)
MICROWIRE format is similar to SPI format except that transmission is half-duplex and uses a master-
slave message passing technique. Each serial transmission begins with an 8-bit control word that is
transmitted from the SSI to the off-chip slave device. During this transmission, the SSI does not receive
incoming data. After the message is sent, the off-chip slave decodes it and waits one serial clock after the
last bit of the 8-bit control message is sent. The off-chip slave then responds with the required data. The
returned data is 4 to 16 bits long, making the total frame length anywhere from 13 to 25 bits.
slave message passing technique. Each serial transmission begins with an 8-bit control word that is
transmitted from the SSI to the off-chip slave device. During this transmission, the SSI does not receive
incoming data. After the message is sent, the off-chip slave decodes it and waits one serial clock after the
last bit of the 8-bit control message is sent. The off-chip slave then responds with the required data. The
returned data is 4 to 16 bits long, making the total frame length anywhere from 13 to 25 bits.
In this configuration, during idle periods:
•
SSIn_CLK is forced low.
•
SSIn_FSS is forced high.
•
The transmit data line SSIn_TX is arbitrarily forced low.
1362
Synchronous Serial Interface (SSI)
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated