Texas Instruments CC2650DK 사용자 설명서

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1.1

Target Applications

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1.2

Overview

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1.3

Functional Overview

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1.3.1

ARM Cortex-M3

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1.3.2

On-Chip Memory

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1.3.3

Radio

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1.3.4

AES Engine With 128-Bit Key Support

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1.3.5

General-Purpose Timers

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1.3.6

Direct Memory Access

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1.3.7

System Control and Clock

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1.3.8

Serial Communications Peripherals

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1.3.9

Programmable IOs

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1.3.10

Sensor Controller

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1.3.11

Random Number Generator

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1.3.12

cJTAG and JTAG

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1.3.13

Power Supply System

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2.1

The Cortex-M3 Processor Introduction

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2.2

Block Diagram

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2.3

Overview

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2.3.1

System-Level Interface

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2.3.2

Integrated Configurable Debug

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2.3.3

Trace Port Interface Unit

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2.3.4

Cortex-M3 System Component Details

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2.4

Programming Model

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2.4.1

Processor Mode and Privilege Levels for Software Execution

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2.4.2

Stacks

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2.4.3

Exceptions and Interrupts

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2.4.4

Data Types

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2.5

Coretex-M3 Core Registers

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2.5.1

Core Register Map

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2.5.2

Core Register Descriptions

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2.6

Instruction Set Summary

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2.7

Cortex-M3 Processor Registers

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2.7.1

CPU_ITM Registers

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2.7.2

CPU_DWT Registers

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2.7.3

CPU_FPB Registers

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2.7.4

CPU_SCS Registers

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2.7.5

CPU_TPIU Registers

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3.1

Cortex™-M3 Peripherals Introduction

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2

SWCU117A – February 2015 – Revised March 2015

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