Texas Instruments CC2650DK 사용자 설명서
10.1.3
Hardware Description
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10.1.4
Module Description
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10.1.5
Performance
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10.1.6
Programming Guidelines
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10.1.7
Conventions and Compliances
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10.2
Cryptography Registers
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10.2.1
CRYPTO Registers
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11
I/O Control
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11.1
Introduction
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11.2
IOC Overview
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11.3
I/O Mapping and Configuration
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11.3.1
Basic I/O Mapping
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11.3.2
MAP AUXIO from the Sensor Controller to DIO Pin
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11.3.3
Map 32-kHz System Clock (LF Clock) to DIO/PIN
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11.4
Edge Detection on Pin (DIO)
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11.4.1
Configure DIO as GPIO Input to Generate Interrupt on EDGE DETECT
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11.5
AON IOC State Latching When Powering Off the MCU Domain
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11.6
Unused I/O Pins
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11.7
GPIO
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11.8
I/O Pin Mapping
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11.9
Peripheral PORTIDs
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11.10
I/O Pin
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11.10.1
Physical Pin
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11.10.2
Pin Configuration
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11.11
I/O Control Registers
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11.11.1
AON_IOC Registers
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11.11.2
IOC Registers
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11.11.3
GPIO Registers
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12
Micro Direct Memory Access (µDMA)
................................................................................
12.1
μDMA Introduction
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12.2
Block Diagram
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12.3
Functional Description
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12.3.1
Channel Assignments
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12.3.2
Priority
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12.3.3
Arbitration Size
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12.3.4
Request Types
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12.3.5
Channel Configuration
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12.3.6
Transfer Modes
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12.3.7
Transfer Size and Increments
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12.3.8
Peripheral Interface
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12.3.9
Software Request
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12.3.10
Interrupts and Errors
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12.4
Initialization and Configuration
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12.4.1
Module Initialization
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12.4.2
Configuring a Memory-to-Memory Transfer
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12.4.3
Configuring Channel Assignments
..........................................................................
12.5
µDMA Registers
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12.5.1
UDMA Registers
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13
Timers
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13.1
General-Purpose Timers
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13.2
Block Diagram
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13.3
Functional Description
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13.3.1
GPTM Reset Conditions
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5
SWCU117A – February 2015 – Revised March 2015
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