Texas Instruments TPS54162EVM Evaluation Module TPS54162EVM TPS54162EVM 데이터 시트
제품 코드
TPS54162EVM
Board Layout
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2.3
Operation
For proper operation of the TPS54162, JP1, JP2, JP3, and JP4 should be properly configured. These are
the recommended settings, using shorting blocks:
the recommended settings, using shorting blocks:
JP1 to Enabled
JP2 to Enabled
JP3 to 1 V/2.5 ns
JP4 to 200 ms
JP2 to Enabled
JP3 to 1 V/2.5 ns
JP4 to 200 ms
In this configuration, the device powers up when power is applied.
JP1 LPM selects how low-power mode is set, enabled or disabled. JP2 ENA turns the device on or off.
JP3 SR selects the slew rate for the switch pin, 1 V/2.5 ns, 1 V/4 ns, 1 V/6 ns or 1 V/1.2 ns. JP4 Delay
selects the reset delay time for the device, 2.2 ms, 47 ms, 150 ms, or 200 ms.
JP3 SR selects the slew rate for the switch pin, 1 V/2.5 ns, 1 V/4 ns, 1 V/6 ns or 1 V/1.2 ns. JP4 Delay
selects the reset delay time for the device, 2.2 ms, 47 ms, 150 ms, or 200 ms.
3
Board Layout
and
show the board layout for the TPS54162EVM PWB. The EVM offers
resistors, capacitors and jumpers to program the switch pin slew rate and regulator turn on delay. Jumpers
are also provided to enable the device and to enable the low-power mode option.
are also provided to enable the device and to enable the low-power mode option.
The TPS54162 converter offers high efficiency but does dissipate power. The PowerPAD™ package
offers an exposed thermal pad to enhance thermal performance. This must be soldered to the copper
landing on the PCB for optimal performance. The PCB provides 1 oz copper planes on the top and bottom
to dissipate heat.
offers an exposed thermal pad to enhance thermal performance. This must be soldered to the copper
landing on the PCB for optimal performance. The PCB provides 1 oz copper planes on the top and bottom
to dissipate heat.
Figure 5. Top Assembly Layer
4
TPS54162EVM
SLVU348 – October 2009
Copyright © 2009, Texas Instruments Incorporated