Texas Instruments XIO2213B Evaluation Module / Reference Design XIO2213BEVM XIO2213BEVM 데이터 시트
제품 코드
XIO2213BEVM
SCPS210F – OCTOBER 2008 – REVISED MAY 2013
8.12 Configuration ROM Mapping Register
The configuration ROM mapping register contains the start address within system memory that maps to
the start address of 1394 configuration ROM for this node. See
the start address of 1394 configuration ROM for this node. See
for a complete description of the
register contents.
OHCI register offset::
34h
Register type:
Read/Write
Default value:
0000 0000h
BIT NUMBER
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 8-8. Configuration ROM Mapping Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31-10
configROMaddr
RW
Configuration ROM address. If a quadlet read request to 1394 offset FFFF F000 0400h through
offset FFFF F000 07FFh is received, the low-order ten bits of the offset are added to this register to
determine the host memory address of the read request. The default value for this field is all 0s.
offset FFFF F000 07FFh is received, the low-order ten bits of the offset are added to this register to
determine the host memory address of the read request. The default value for this field is all 0s.
9-0
RSVD
R
Reserved. Bits 9-0 return 00 0000 0000b when read.
8.13 Posted Write Address Low Register
The posted write address low register communicates error information if a write request is posted and an
error occurs while the posted data packet is being written. See
error occurs while the posted data packet is being written. See
for a complete description of the
register contents.
OHCI register offset:
38h
Register type:
Read/Update
Default value:
XXXX XXXXh
BIT NUMBER
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESET STATE
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Table 8-9. Posted Write Address Low Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31-0
offsetLo
RU
Offset low. The lower 32 bits of the 1394 destination offset of the write request that failed.
Copyright © 2008–2013, Texas Instruments Incorporated
1394 OHCI Memory-Mapped Register Space
141
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