Microchip Technology MA240029 데이터 시트

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PIC24FJ128GA310 FAMILY
DS39996F-page 142
 2010-2011 Microchip Technology Inc.
REGISTER 8-44:
INTTREG: INTERRUPT CONTROLLER TEST REGISTER
R-0, HSC
U-0
R/W-0
U-0
R-0, HSC
R-0, HSC
R-0, HSC
R-0, HSC
CPUIRQ
VHOLD
ILR3
ILR2
ILR1
ILR0
bit 15
bit 8
U-0
R-0, HSC
R-0, HSC
R-0, HSC
R-0, HSC
R-0, HSC
R-0, HSC
R-0, HSC
VECNUM6
VECNUM5
VECNUM4
VECNUM3
VECNUM2
VECNUM1
VECNUM0
bit 7
bit 0
Legend:
HSC = Hardware Settable/Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
CPUIRQ:
 Interrupt Request from Interrupt Controller CPU bit
1
 = An interrupt request has occurred but has not yet been Acknowledged by the CPU. This happens
when the CPU priority is higher than the interrupt priority
0
 = No interrupt request is unacknowledged
bit 14
Unimplemented:
 Read as ‘0’
bit 13
VHOLD:
 Vector Number Capture Configuration bit
1
 = The VECNUM bits contain the value of the highest priority pending interrupt
0
 = The VECNUM bits contain the value of the last Acknowledged interrupt (i.e., the last interrupt that
has occurred with higher priority than the CPU, even if other interrupts are pending)
bit 12
Unimplemented:
 Read as ‘0’
bit 11-8
ILR<3:0>:
 New CPU Interrupt Priority Level bits
1111
 = CPU interrupt priority level is 15 


0001
 = CPU interrupt priority level is 1
0000
 = CPU interrupt priority level is 0
bit 7
Unimplemented:
 Read as ‘0’
bit 6-0
VECNUM<5:0>:
 Vector Number of Pending Interrupt or Last Acknowledged Interrupt bits
VHOLD = 1: The VECNUM bits indicate the vector number (from 0 to 118) of the last interrupt to occur
VHOLD = 0: The VECNUM bits indicate the vector number (from 0 to 118) of the interrupt request
currently being handled