Microchip Technology MA240029 데이터 시트
2010-2011 Microchip Technology Inc.
DS39996F-page 65
PIC24FJ128GA310 FAMILY
4.2.5
EXTENDED DATA SPACE (EDS)
The Extended Data Space (EDS) allows PIC24F
devices to address a much larger range of data than
would otherwise be possible with a 16-bit address
range. EDS includes any additional internal data mem-
ory not directly accessible by the lower 32-Kbyte data
address space, and any external memory through
EPMP.
In addition, EDS also allows read access to the
program memory space. This feature is called Program
Space Visibility (PSV), and is discussed in detail in
devices to address a much larger range of data than
would otherwise be possible with a 16-bit address
range. EDS includes any additional internal data mem-
ory not directly accessible by the lower 32-Kbyte data
address space, and any external memory through
EPMP.
In addition, EDS also allows read access to the
program memory space. This feature is called Program
Space Visibility (PSV), and is discussed in detail in
.
displays the entire EDS space. The EDS is
organized as pages, called EDS pages, with one page
equal to size of the EDS window (32 Kbytes). A partic-
ular EDS page is selected through the Data Space
Read register (DSRPAG) or Data Space Write register
(DSWPAG). For PSV, only the DSRPAG register is
used. The combination of the DSRPAG register value
and the 16-bit wide data address forms a 24-bit
Effective Address (EA).
equal to size of the EDS window (32 Kbytes). A partic-
ular EDS page is selected through the Data Space
Read register (DSRPAG) or Data Space Write register
(DSWPAG). For PSV, only the DSRPAG register is
used. The combination of the DSRPAG register value
and the 16-bit wide data address forms a 24-bit
Effective Address (EA).
The data addressing range of PIC24FJ128GA310 family
devices depends on the version of the Enhanced
Parallel Master Port implemented on a particular device;
this is in turn a function of device pin count.
devices depends on the version of the Enhanced
Parallel Master Port implemented on a particular device;
this is in turn a function of device pin count.
lists the total memory accessible by each of the devices
in this family. For more details on accessing external
memory using EPMP, refer to the
in this family. For more details on accessing external
memory using EPMP, refer to the
“PIC24F Family Refer-
ence Manual
”,
Section 42. “Enhanced Parallel Master
Port (EPMP)”
(DS39730).
.
FIGURE 4-4:
EXTENDED DATA SPACE
TABLE 4-35:
TOTAL ACCESSIBLE DATA
MEMORY
MEMORY
Family
Internal
RAM
External RAM
Access Using
EPMP
PIC24FJXXXGA310
8K
Up to 16 MB
PIC24FJXXXGA308
8K
Up to 64K
PIC24FJXXXGA306
8K
Up to 64K
Note:
Accessing Page 0 in the EDS window will
generate an address error trap as Page 0
is the base data memory (data locations
0800h to 7FFFh in the lower data space).
generate an address error trap as Page 0
is the base data memory (data locations
0800h to 7FFFh in the lower data space).
0000h
Special
Registers
32-Kbyte
EDS
8000h
Program Memory
DSxPAG
= 001h
DSx PAG
= 1FFh
DSRPAG
= 200h
DSRPAG
= 3FFh
Function
008000h
00FFFEh
000000h
7F8001h
FFFFFEh
007FFEh
7FFFFFh
Program
Space
0800h
FFFEh
EDS Pages
EPMP Memory Space
(1)
External
Memory
Memory
Access
using
EPMP
(1)
FF8000h
DSRPAG
= 2FFh
7F8000h
7FFFFEh
Access
Program
Space
Access
Program
Space
Access
DSRPAG
= 300h
000001h
007FFFh
Program
Space
Access
Note
1:
The range of addressable memory available is dependent on the device pin count and EPMP implementation.
External
Memory
Access
using
EPMP
(1)
Internal
Data
Memory
Space
(up to
30 Kbytes)
(Lower
Word)
(Lower
Word)
(Upper
Word)
(Upper
Word)
Window