Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트
MPL3115A2
Sensors
24
Freescale Semiconductor, Inc.
7.3.2
F_DATA (0x0E)
F_DATA is a read only address which provides access to 8-bit FIFO data. FIFO holds a maximum of 32 samples; a maximum
of 5 x 32 = 160 data bytes of samples can be read. When F_MODE bit in FIFO SETUP (F_SETUP) register is set to logic “1”,
the F_DATA pointer shares the same address location as OUT_P_MSB (0x01); therefore all accesses of the FIFO buffer data
use the I
the F_DATA pointer shares the same address location as OUT_P_MSB (0x01); therefore all accesses of the FIFO buffer data
use the I
2
C address 0x01. Reads from the other data registers (0x02, 0x03, 0x04, 0x05) will return a value of 0x00. Note: The
FIFO will NOT suspend to data accumulation during read transactions to F_DATA.
7.3.3
F_SETUP (0x0F)
A FIFO sample count exceeding the watermark event does not stop the FIFO from accepting new data.
The FIFO update rate is dictated by the selected system acquisition rate (ST bits of CTRL_REG2).
When a byte is read from the FIFO buffer the oldest sample data in the FIFO buffer is returned and also deleted from the front
The FIFO update rate is dictated by the selected system acquisition rate (ST bits of CTRL_REG2).
When a byte is read from the FIFO buffer the oldest sample data in the FIFO buffer is returned and also deleted from the front
of the FIFO buffer, while the FIFO sample count is decremented by one. It is assumed that the host application shall use the I
2
C
BURST read transaction to dump the FIFO.
Table 28. F_DATA 8-bit Data Access Register
7
6
5
4
3
2
1
0
R
F_DATA
W
Reset
0
0
0
0
0
0
0
0
Table 29. Read Accesses through F_DATA
1
st
read
OUT_P_MSB (oldest)
2
nd
read
OUT_P_CSB (oldest)
3
rd
read
OUT_P_LSB (oldest)
4
th
read
OUT_T_MSB (oldest)
5
th
read
OUT_T_LSB (oldest)
.
.
.
.
.
.
.
.
.
.
OUT_T_LSB (oldest)
0x00
0x00
Table 30. F_SETUP Register
7
6
5
4
3
2
1
0
R
F_MODE1
F_MODE0
F_WMRK5
F_WMRK4
F_WMRK3
F_WMRK2
F_WMRK1
F_WMRK0
W
Reset
0
0
0
0
0
0
0
0
Table 31. F_SETUP Bit Descriptions
Name
Description
F_MODE[1:0]
(1)(2)(3)
FIFO buffer overflow mode.
Default value: 0
00: FIFO is disabled
01: FIFO contains the most recent samples when overflowed (circular buffer). Oldest sample is discarded to be
replaced by new sample
10: FIFO stops accepting new samples when overflowed
11: Not Used
The FIFO is flushed whenever the FIFO is disabled, or transitioning from “STANDBY” mode to “ACTIVE” mode.
Disabling the FIFO (F_MODE = 00) resets the F_OVF, F_WMRK_FLAG, F_CNT to zero.
A FIFO overflow event (i.e. F_CNT = 32) will assert the F_OVF flag and a FIFO sample count equal to the sample
count watermark (i.e. F_WMRK) asserts the F_WMRK_FLAG event flag. To switch between FIFO modes, first
disable the FIFO and then write the new value to F_MODE.
Default value: 0
00: FIFO is disabled
01: FIFO contains the most recent samples when overflowed (circular buffer). Oldest sample is discarded to be
replaced by new sample
10: FIFO stops accepting new samples when overflowed
11: Not Used
The FIFO is flushed whenever the FIFO is disabled, or transitioning from “STANDBY” mode to “ACTIVE” mode.
Disabling the FIFO (F_MODE = 00) resets the F_OVF, F_WMRK_FLAG, F_CNT to zero.
A FIFO overflow event (i.e. F_CNT = 32) will assert the F_OVF flag and a FIFO sample count equal to the sample
count watermark (i.e. F_WMRK) asserts the F_WMRK_FLAG event flag. To switch between FIFO modes, first
disable the FIFO and then write the new value to F_MODE.