Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트
MMA8652FC
Sensors
34
Freescale Semiconductor, Inc.
6.7.4
0x13: PL_BF_ZCOMP Back/Front and Z Compensation register
The Z-Lock angle compensation bits allows you to adjust the Z-lockout region from 14° up to 43°. On power-up, the default Z-lockout
angle is set to the default value of 29°. The back-to-front trip angle is set by default to ±75°, and this angle can be adjusted from
a range of 65° to 80° (with 5° step increments).
angle is set to the default value of 29°. The back-to-front trip angle is set by default to ±75°, and this angle can be adjusted from
a range of 65° to 80° (with 5° step increments).
6.7.5
0x14: P_L_THS_REG Portrait/Landscape Threshold and Hysteresis register
This register represents the Portrait-to-Landscape trip threshold register used to set the trip angle for transitioning from Portrait
to Landscape mode and from Landscape to Portrait mode. This register includes a value for the hysteresis.
to Landscape mode and from Landscape to Portrait mode. This register includes a value for the hysteresis.
Table 41. 0x13: PL_BF_ZCOMP register (Read/Write)
Back to Register Address Map
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BKFR[1]
BKFR[0]
—
—
—
ZLOCK[2]
ZLOCK[1]
ZLOCK[0]
Table 42. PL_BF_ZCOMP register
Bit(s)
Field
Description
Notes
7–6
BKFR[7:6]
Back/Front trip angle threshold
(1)
• Step size = 5°
• Range = ±(65° to 80°)
• Range = ±(65° to 80°)
1. All angles are accurate to ±2°.
01
±75° (default)
5–3
—
Can be 0 or 1.
2–0
ZLOCK[2:0]
Z-lock angle threshold
• Step size is 4°
• Range is from 14° to 43°
• Range is from 14° to 43°
100
29° (default)
111
43° (maximum)
Table 43. Z-lock threshold angles
Z-lock Value
Threshold Angle
0x00
14°
0x01
18°
0x02
21°
0x03
25°
0x04
29°
0x05
33°
0x06
37°
0x07
42°
Table 44. Back/Front orientation definitions
BKFR
Back/Front Transition
Front/Back Transition
00
Z < 80° or Z > 280°
Z > 100° and Z < 260°
01
Z < 75° or Z > 285°
Z > 105° and Z < 255°
10
Z < 70° or Z > 290°
Z > 110° and Z < 250°
11
Z < 65° or Z > 295°
Z > 115° and Z < 245°
Table 45. 0x14: P_L_THS_REG register (Read/Write)
Back to Register Address Map
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
P_L_THS[4]
P_L_THS[3]
P_L_THS[2]
P_L_THS[1]
P_L_THS[0]
HYS[2]
HYS[1]
HYS[0]
Table 46. P_L_THS_REG register
Bit(s)
Field
Description
Notes