Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

Sensors

54

Freescale Semiconductor, Inc.

CTRL_REG2 register is used to enable Self-Test, Software Reset, and Auto-SLEEP. In addition, it enables you to configure the 
SLEEP and WAKE mode power scheme selection (oversampling modes).

When the reset bit is enabled, all registers are reset and are loaded with default values. Writing ‘1’ to the RST bit immediately 
resets the device, no matter whether it is in ACTIVE/WAKE, ACTIVE/SLEEP, or STANDBY mode. 

The I

2

C communication system is reset to avoid accidental corrupted data access.

At the end of the boot process the RST bit is deasserted to 0. Reading this bit will return a value of zero.

The (S)MODS[1:0] bits select which Oversampling mode is to be used, as shown in 

Table 100

. The Oversampling modes are 

available in both WAKE Mode MOD[1:0] and also in the SLEEP Mode SMOD[1:0].

ST

RST

0

SMODS1

SMODS0

SLPE

MODS1

MODS0

7

ST

Self-Test Enable
Activates the self-test function. 
• When ST is set, the X, Y, and Z outputs will shift. 
0 Self-Test disabled (default)
1 Self-Test enabled

6

RST

Software Reset
RST bit is used to activate the software reset.
• The reset mechanism is enabled in both STANDBY and ACTIVE modes.
0 Device reset disabled (default)
1 Device reset enabled.

5

0

4–3

SMODS[1:0]

SLEEP mode power scheme selection
See 

Table 100

 and 

Table 101

00 (default)

2

SLPE

Auto-SLEEP enable
0 Auto-SLEEP is not enabled (default)
1 Auto-SLEEP is enabled. 

1–0

MODS[1:0]

ACTIVE mode power scheme selection
See 

Table 100

 and 

Table 101

00 (default)

0

0

Normal 

0

1

Low Noise Low Power

1

0

High Resolution

1

1

Low Power