Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

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FXOS8700CQ
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Freescale Semiconductor, Inc.
10.9.2
A_FFMT_SRC (0x16) register
Freefall/motion source register. Read-only register.
This register keeps track of the acceleration event which is triggering (or has triggered, in case of A_FFMT_CFG[a_ffmt_ele
= 1) the event flag. In particular A_FFMT_SRC[a_ffmt_ea] is set to a logic ‘1’ when the logical combination of acceleration event 
flags specified in A_FFMT_CFG register is true. This bit is used in combination with the values in CTRL_REG4[int_en_ffmt] and 
CTRL_REG5[int_cfg_ffmt] register bits to generate the freefall/motion interrupts.
Table 79. A_FFMT_SRC register
a_ffmt_ea
a_ffmt_zhe
a_ffmt_zhp
a_ffmt_yhe
a_ffmt_yhp
a_ffmt_xhe
a_ffmt_xhp
0
0
0
0
0
0
0
0
Table 80. A_FFMT_SRC bit descriptions
Field
Description
a_ffmt_ea
Event active flag. 
0: No event flag has been asserted
1: One or more event flag has been asserted. See the description of the A_FFMT_CFG[a_ffmt_oae] bit to determine the 
effect of the 3-axis event flags on the a_ffmt_ea bit.
a_ffmt_zhe
Z-high event flag. 
0: Event detected
1: Z-high event has been detected 
This bit always reads zero if the a_ffmt_zefe control bit is set to zero
a_ffmt_zhp
Z-high event polarity flag. 
0: Z event was positive g
1: Z event was negative g 
This bit read always zero if the a_ffmt_zefe control bit is set to zero
a_ffmt_yhe
Y-high event flag.  
0: No event detected
1: Y-high event has been detected 
This bit read always zero if the a_ffmt_yefe control bit is set to zero
a_ffmt_yhp
Y-high event polarity flag. 
0: Y event detected was positive g
1: Y event was negative g 
This bit always reads zero if the a_ffmt_yefe control bit is set to zero
a_ffmt_xhe
X-high event flag. 
0: No event detected
1: X-high event has been detected 
This bit always reads zero if the a_ffmt_xefe control bit is set to zero
a_ffmt_xhp
X-high event polarity flag. 
0: X event was positive g
1: X event was negative g
This bit always reads zero if the a_ffmt_xefe control bit is set to zero