Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

Sensors
Freescale Semiconductor, Inc.

59

Freefall/motion detection threshold registers.

 

 

a_ffmt_dbcntm

ths[6:0]

0

0b000_0000

a_ffmt_dbcntm

The ASIC uses a_ffmt_dbcntm to set the acceleration FFMT debounce counter clear mode independent of the value of 
the a_ffmt_ths_xyz_en.
a_ffmt_dbcntm bit configures the way in which the debounce counter is reset when the inertial event of interest is 
momentarily not true.
When a_ffmt_dbcntm bit is a logic ‘1’, the debounce counter is cleared to 0 whenever the inertial event of interest is no 
longer true (part b, 

) while if the a_ffmt_dbcntm bit is set to logic ‘0’ the debounce counter is decremented by 1 

whenever the inertial event of interest in longer true 
(part c, 

) until the debounce counter reaches 0 or the inertial event of interest become active. 

The decrementing of the debounce counter acts to filter out irregular spurious events which might impede the correct 
detection of inertial events. 

ths[6:0]

Freefall/motion detection threshold: default value: 0b000_0000. Resolution is fixed at 63 mg/LSB.

a_ffmt_ths_xyz_en

a_ffmt_ths_x[12:6]

0

0b000_0000

a_ffmt_ths_xyz_en

For a_ffmt_ths_xyz_en = 0 the ASIC uses the ffmt_ths[6:0] value located in register x17[6:0] as a common threshold 
for the X, Y, and Z-axis acceleration detection. The common unsigned 7-bit acceleration threshold has a fixed 
resolution of 63 mg/LSB, with a range of 0-127 counts. 
For a_ffmt_ths_xyz_en = 1 the ASIC ignores the common 7-bit G_FFMT_THS value located in register x17 when 
executing the FFMT function, and the following independent threshold values are used for each axis:
A_FFMT_THS_X_MSB and A_FFMT_THS_X_LSB are used for the X-axis acceleration threshold,
A_FFMT_THS_Y_MSB and A_FFMT_THS_Y_LSB for the Y-axis acceleration threshold,
A_FFMT_THS_Z_MSB and A_FFMT_THS_Z_LSB for the Z-axis acceleration threshold. 
The A_FFMT_THS_X/Y/Z thresholds are 13-bit unsigned values that have the same resolution as the accelerometer 
output data determined by XYZ_DATA_CFG fs [1:0]. The a_ffmt_ths_xyz_en and a_ffmt_trans_ths_en bits must not 
be enabled simultaneously.

a_ffmt_ths_x[12:6]

 7-bit MSB of X-axis acceleration threshold

a_ffmt_ths_x[5:0]

—

—

0b00_0000

0

0

a_ffmt_trans_ths_en

a_ffmt_ths_y[12:6]

0

0b000_0000

a_ffmt_ths_y[5:0]

—

—

0b00_0000

0

0